基于ZedBoard的QPSK数字解调和以太网传输设计实现
发布时间：2018-09-14 16:21
【摘要】：QPSK调制和相干解调具有频谱利用率高，抗干扰能力强等显著的优点，是现代通信领域重要的调制解调方法，在卫星及移动通信中广泛的应用。通过对QPSK数字解调的原理以及Xilinx嵌入式技术开发的研究，本文实现了基于ZedBoard的QPSK数字解调和以太网传输的设计。该设计充分利用ZedBoard平台主芯片Zynq-7000APSoC集28nm7系列FPGA与双核CortexARMA9于一体的异构多核处理器优势，在Zynq的可编程逻辑（PL）端完成载波70MHzQPSK数字信号采集和相干解调、解调后基带信号在ARM处理器（PS）端采用RTP实时传输协议进行以太网传输。论文研究内容主要包括以下几个方面： 对XilinxZynq平台的配置与启动进行研究，在ZedBoard中移植了Linux操作系统，并且建立了对应Linux系统版本的交叉编译工具链，成功的在ZedBoard平台中移植了RTP协议实时传输所需的jrtplib-3.7.1库和jthread-1.2.1库，以及设计了本文的软硬件协同设计开发流程，为本文设计方案的实施作充分的准备。 结合QPSK数字解调的基本原理，设计了基于ZedBoard的QPSK数字解调和以太网传输的系统框图，以及根据解调的实际需要选择了ADI公司的AD9467FMC子板作为数字信号采集板，设计了采集控制IP核。在MATLAB/Simulink中完成了解调算法的仿真，利用XilinxSystemGeneratorforDSP工具实现算法仿真到VerilogHDL硬件描述语言的转换，最终将解调算法封装成Xilinx嵌入式系统EDK工程中的算法IP核，并且将算法IP核和采集控制IP核以及Zynq的ARM处理器相连，编写相应的驱动程序，搭建了整个设计的硬件平台。 本文针对载波70MHz带宽10MHz的QPSK调制信号情况在SystemGenerator中搭建了Costas环数字解调模型，，详细的介绍了数控振荡器（NCO）、环路滤波器（LF）和低通滤波器的设计及参数设置。设计了Linux系统下RTP实时传输流程，编写了Linux系统下RTP实时传输应用程序。最后，完成对Zynq的PS端控制AD子板进行70MHz中频信号采集的性能测试，和RTP协议以太网实时传输的性能测试，以及分别设置不同的QPSK信号的载波频率与本地NCO产生信号的频差进行Costas环相干解调仿真测试，给出了仿真测试结果。 仿真测试结果表明，本文的设计的基于ZedBoard的QPSK数字解调和以太网传输方案的正确性和可行性。
[Abstract]:QPSK modulation and coherent demodulation have many advantages, such as high spectrum efficiency and strong anti-jamming ability. They are important modulation and demodulation methods in the field of modern communication, and are widely used in satellite and mobile communications. Through the research on the principle of QPSK digital demodulation and the development of Xilinx embedded technology, this paper realizes the design of QPSK digital demodulation and Ethernet transmission based on ZedBoard. This design makes full use of the advantage of heterogeneous multi-core processor which integrates 28nm7 series FPGA and dual-core CortexARMA9 on the main chip Zynq-7000APSoC of ZedBoard platform, and completes the acquisition and coherent demodulation of carrier 70MHzQPSK digital signal in the Zynq programmable logic (PL) terminal. The demodulated baseband signal is transmitted by RTP real-time transmission protocol at the (PS) end of the ARM processor. The main contents of this paper are as follows: the configuration and startup of XilinxZynq platform are studied, the Linux operating system is transplanted in ZedBoard, and the cross-compiling tool chain corresponding to the Linux system version is established. The jrtplib-3.7.1 library and jthread-1.2.1 library needed for real-time transmission of RTP protocol are successfully transplanted into ZedBoard platform, and the software / hardware co-design and development flow of this paper is designed, which makes a full preparation for the implementation of the design scheme in this paper. Combined with the basic principle of QPSK digital demodulation, the system block diagram of QPSK digital demodulation and Ethernet transmission based on ZedBoard is designed. According to the actual needs of demodulation, the AD9467FMC sub-board of ADI Company is selected as the digital signal acquisition board. The acquisition control IP core is designed. The demodulation algorithm is simulated in MATLAB/Simulink, and the conversion from algorithm simulation to VerilogHDL hardware description language is realized by using XilinxSystemGeneratorforDSP tool. Finally, the demodulation algorithm is encapsulated into the IP core in the EDK project of Xilinx embedded system. The algorithm IP core is connected with the acquisition control IP core and the ARM processor of Zynq, and the corresponding driver is written, and the hardware platform of the whole design is built. In this paper, the digital demodulation model of Costas loop is built in SystemGenerator for the QPSK modulation signal of carrier 70MHz bandwidth 10MHz. The design and parameter setting of (NCO), loop filter (LF) and low pass filter of numerical controlled oscillator are introduced in detail. The RTP real-time transmission flow under Linux system is designed, and the RTP real-time transmission application program under Linux system is written. Finally, the performance test of 70MHz if signal acquisition and RTP protocol Ethernet real-time transmission is completed for the PS control AD sub-board of Zynq. The carrier frequency of different QPSK signal and the frequency difference of the local NCO signal are set respectively to carry out the simulation test of Costas ring coherent demodulation. The simulation results are given. The simulation results show that the design of QPSK digital demodulation and Ethernet transmission scheme based on ZedBoard is correct and feasible.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN911.3;TP393.11
本文编号：2243234
[Abstract]:QPSK modulation and coherent demodulation have many advantages, such as high spectrum efficiency and strong anti-jamming ability. They are important modulation and demodulation methods in the field of modern communication, and are widely used in satellite and mobile communications. Through the research on the principle of QPSK digital demodulation and the development of Xilinx embedded technology, this paper realizes the design of QPSK digital demodulation and Ethernet transmission based on ZedBoard. This design makes full use of the advantage of heterogeneous multi-core processor which integrates 28nm7 series FPGA and dual-core CortexARMA9 on the main chip Zynq-7000APSoC of ZedBoard platform, and completes the acquisition and coherent demodulation of carrier 70MHzQPSK digital signal in the Zynq programmable logic (PL) terminal. The demodulated baseband signal is transmitted by RTP real-time transmission protocol at the (PS) end of the ARM processor. The main contents of this paper are as follows: the configuration and startup of XilinxZynq platform are studied, the Linux operating system is transplanted in ZedBoard, and the cross-compiling tool chain corresponding to the Linux system version is established. The jrtplib-3.7.1 library and jthread-1.2.1 library needed for real-time transmission of RTP protocol are successfully transplanted into ZedBoard platform, and the software / hardware co-design and development flow of this paper is designed, which makes a full preparation for the implementation of the design scheme in this paper. Combined with the basic principle of QPSK digital demodulation, the system block diagram of QPSK digital demodulation and Ethernet transmission based on ZedBoard is designed. According to the actual needs of demodulation, the AD9467FMC sub-board of ADI Company is selected as the digital signal acquisition board. The acquisition control IP core is designed. The demodulation algorithm is simulated in MATLAB/Simulink, and the conversion from algorithm simulation to VerilogHDL hardware description language is realized by using XilinxSystemGeneratorforDSP tool. Finally, the demodulation algorithm is encapsulated into the IP core in the EDK project of Xilinx embedded system. The algorithm IP core is connected with the acquisition control IP core and the ARM processor of Zynq, and the corresponding driver is written, and the hardware platform of the whole design is built. In this paper, the digital demodulation model of Costas loop is built in SystemGenerator for the QPSK modulation signal of carrier 70MHz bandwidth 10MHz. The design and parameter setting of (NCO), loop filter (LF) and low pass filter of numerical controlled oscillator are introduced in detail. The RTP real-time transmission flow under Linux system is designed, and the RTP real-time transmission application program under Linux system is written. Finally, the performance test of 70MHz if signal acquisition and RTP protocol Ethernet real-time transmission is completed for the PS control AD sub-board of Zynq. The carrier frequency of different QPSK signal and the frequency difference of the local NCO signal are set respectively to carry out the simulation test of Costas ring coherent demodulation. The simulation results are given. The simulation results show that the design of QPSK digital demodulation and Ethernet transmission scheme based on ZedBoard is correct and feasible.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TN911.3;TP393.11
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