一种解析与执行联动的SDN可编程数据平面
发布时间：2018-10-31 13:32
【摘要】：当前互联网技术发展迅速,新型网络协议的不断出现,要求网络转发设备能够及时提供对新协议的支持.目前,软件定义网络要兼顾可编程协议解析和数据转发性能仍然面临诸多困难.对此,本文提出了基于解析和执行联动结构的可编程数据平面(CLIPE),通过在硬件的解析器上部署用户可定义模块,可实时更新硬件中解析逻辑中的协议多叉树,从而实现协议解析的用户定制性;并且,通过解析器和动作执行器联动的创新结构,减少了整个处理架构的冗余性,从而减小动作执行时延,提高了硬件资源利用率,与现有方案相比,节约了11%的逻辑资源和24%的BRAM资源.最后,本文基于NetFPGA-10G板卡完成了本方案的原型机实现.
[Abstract]:With the rapid development of Internet technology and the emergence of new network protocols, network forwarding devices are required to provide timely support for the new protocols. At present, the software definition network still faces many difficulties to combine the performance of programmable protocol parsing and data forwarding. In this paper, a programmable data plane (CLIPE), based on parse and execution linkage structure is proposed. By deploying user-defined modules on the parser of the hardware, the protocol multitree in the parse logic can be updated in real time. In order to realize the customization of protocol parsing; In addition, through the innovative structure of the linkage of the parser and the action actuator, the redundancy of the whole processing architecture is reduced, and the delay of action execution is reduced, and the utilization rate of hardware resources is improved. It saves 11% logical resources and 24% BRAM resources. Finally, the prototype of this scheme is implemented based on NetFPGA-10G card.
【作者单位】： 国家数字交换系统工程技术研究中心;
【分类号】：TP393.0
本文编号：2302372
[Abstract]:With the rapid development of Internet technology and the emergence of new network protocols, network forwarding devices are required to provide timely support for the new protocols. At present, the software definition network still faces many difficulties to combine the performance of programmable protocol parsing and data forwarding. In this paper, a programmable data plane (CLIPE), based on parse and execution linkage structure is proposed. By deploying user-defined modules on the parser of the hardware, the protocol multitree in the parse logic can be updated in real time. In order to realize the customization of protocol parsing; In addition, through the innovative structure of the linkage of the parser and the action actuator, the redundancy of the whole processing architecture is reduced, and the delay of action execution is reduced, and the utilization rate of hardware resources is improved. It saves 11% logical resources and 24% BRAM resources. Finally, the prototype of this scheme is implemented based on NetFPGA-10G card.
【作者单位】： 国家数字交换系统工程技术研究中心;
【分类号】：TP393.0
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