面向SDN的软件定义硬件计数器研究
[Abstract]:The software defined network (SDN) decouples the data plane from the control plane and makes the network more flexible and controllable. In SDN architecture, in order to support the SDN controller to obtain the global network statistics information and manage the whole network efficiently, it also supports the upper layer applications such as network measurement, intrusion detection, traffic engineering and so on. SDN switches need to maintain a large variety of statistical counters. However, at present, these SDN counters are usually based on the ASIC implementation and only support the passive statistical mode of "request response". The implementation of these counters faces some severe challenges: 1) high cost of storage resources, 2) poor flexibility, and 3) low precision of statistics. In view of these three challenges of SDN counter, this paper proposes a software defined hardware counter SDHC (Software Defined Hardware Counters). For SDN by decoupling the definition and implementation of the counter. The main work and innovation of this paper are as follows: 1. The concept and model of hardware counter defined by software are put forward in this paper. By dividing counter processing into three sections, SDHC model realizes the management of counter definition to control the behavior of counter on software, and realizes the decoupling of counter definition and implementation. It effectively solves the problem of traditional realization. By using the idea of according to demand distribution, the counter utilization ratio can be improved effectively, and the storage overhead can be reduced, and the controller is allowed to control the counter flexibly by providing flexible and convenient SDHC interface from north to south, thus improving the flexibility. By introducing the active statistical model of actively reporting the counter value, the statistical error caused by the access delay is avoided and the statistical accuracy is improved by 2. 2. The key technology of SDHC is studied deeply. The definition and compression method of message between software and hardware are studied in depth, which improves the transmission efficiency between software and hardware, and reduces the requirement of transmission bandwidth. In this paper, the classification and implementation mechanism of SDHC statistical pattern are studied, and the real-time mode based on update trigger and the timing mode based on timer trigger are proposed, which can effectively meet the needs of high precision statistics in various applications. At the same time, the compression method of counter value return message in real time mode is studied to avoid the problem of high network bandwidth caused by the burst of flow. The implementation model of SDHC is designed in detail. The specific function and implementation of each module in the SDHC implementation model are designed in detail, which effectively improves the working efficiency of each module and thus improves the overall performance of SDHC. By analyzing the related behavior of SDHC, the interface of SDHC is designed in detail, so that the controller and the upper application can control the counter flexibly. The prototype system of SDHC is implemented, and the prototype system is tested and evaluated. The results show that SDHC can provide high update performance and statistical accuracy, and the update delay caused by SDHC is negligible compared with the transmission delay between controller and switch. In conclusion, in order to solve the problems existing in SDN counters, this paper proposes a software defined hardware counter SDHC. for SDN. Because the model has low storage resource overhead, high flexibility and high statistical precision, it is of theoretical significance and practical value for the design and implementation of SDN switch.
【学位授予单位】:国防科学技术大学
【学位级别】:硕士
【学位授予年份】:2014
【分类号】:TP393.02
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