基于NetFPGA 10G的PON系统设计与实现
发布时间：2018-11-14 07:38
【摘要】：随着科技的进步与信息产业的发展，人们对网络服务质量及网络带宽的需求随之提高。然而近年来核心网带宽增长迅速，核心网与用户之间的接入网发展却相对滞后。作为光纤接入技术之一的以太无源光网络(Ethernet Passive OpticalNetwork, EPON)技术有效利用了现有以太网的宝贵资源，并具有成本低、带宽高、维护简单等优点，，被认为是解决“最后一公里”问题的最佳方案之一。 NetFPGA是斯坦福大学设计开发的低成本开源性网络测试平台，该平台既具有硬件的高速处理性，又具备软件可编程、可重用的灵活性。本文分析了EPON系统现有仿真环境，并对EPON的关键技术及NetFPGA10G平台的应用与开发进行了深入研究，提出了一种基于NetFPGA10G平台的PON系统设计方案。本文的主要研究内容如下： (1)对EPON系统与NetFPGA10G平台的研究背景及国内外研究现状进行了深入调研。介绍了EPON系统的层次模型与工作原理，并对EPON现有的仿真环境进行了分析，探讨了在NetFPGA10G平台上实现PON系统原型搭建的必要性。 (2)对NetFPGA10G数据通路的功能模块进行了介绍，深入分析了数据处理流程，并针对模块间通信问题对AXI4-Stream总线进行了研究。 (3)针对EPON系统中的光线路终端(Optical Line Terminal, OLT)与光网络单元(Optical Network Unit, ONU)功能的差异分别给出了其设计方案，该方案选用与PON系统工作在OSI参考模型的相同层面，且结构最为简洁的Reference NIC作为参考工程；采用模块化设计思想，降低了功能模块实现的复杂度；编程过程中采用三段式状态机，减少了输入信号对输出信号的干扰；核心处理模块采用后端缓存机制，以便对上下行数据传输时隙的控制。 本方案采用Verilog HDL进行编程，结合ISE、XPS等工具将OLT/ONU核心模块嵌入至NetFPGA10G数据通路中，实现了EPON系统的上下行数据通路、MPCP协议及以太网交换功能，并对所实现的EPON系统进行了仿真验证。
[Abstract]:With the progress of science and technology and the development of information industry, the demand for network service quality and network bandwidth has been improved. However, the bandwidth of core network grows rapidly in recent years, but the access network between core network and user lags behind. As one of the optical fiber access technologies, the Ethernet passive optical network (Ethernet Passive OpticalNetwork, EPON) technology effectively utilizes the valuable resources of the existing Ethernet, and has the advantages of low cost, high bandwidth, simple maintenance and so on. Is considered to be one of the best solutions to the "last kilometer" problem. NetFPGA is a low cost open source network testing platform designed and developed by Stanford University. The platform not only has the high speed processing of hardware, but also has the flexibility of software programmable and reusable. In this paper, the existing simulation environment of EPON system is analyzed, the key technology of EPON and the application and development of NetFPGA10G platform are deeply studied, and a design scheme of PON system based on NetFPGA10G platform is put forward. The main contents of this paper are as follows: (1) the research background of EPON system and NetFPGA10G platform and the current research situation at home and abroad have been deeply investigated. This paper introduces the hierarchical model and working principle of EPON system, analyzes the existing simulation environment of EPON, and discusses the necessity of building prototype of PON system on NetFPGA10G platform. (2) the function module of NetFPGA10G data path is introduced, the data processing flow is deeply analyzed, and the AXI4-Stream bus is studied for the communication between modules. (3) according to the difference of the function between the optical line terminal (Optical Line Terminal, OLT) and the optical network unit (Optical Network Unit, ONU) in the EPON system, the design scheme is given respectively. The scheme is chosen to work on the same level as the PON system in the OSI reference model. And the structure of the most concise Reference NIC as a reference project; The modularization design idea is adopted to reduce the complexity of the function module, and the three-stage state machine is used in the programming process, which reduces the interference of the input signal to the output signal. The core processing module adopts back-end buffer mechanism to control the time slot of data transmission. This scheme uses Verilog HDL to program, combines ISE,XPS and other tools to embed the core module of OLT/ONU into the NetFPGA10G data path, realizes the up / down data path of EPON system, MPCP protocol and Ethernet exchange function. The EPON system is simulated and verified.
【学位授予单位】：河北工程大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP393.11
本文编号：2330498
[Abstract]:With the progress of science and technology and the development of information industry, the demand for network service quality and network bandwidth has been improved. However, the bandwidth of core network grows rapidly in recent years, but the access network between core network and user lags behind. As one of the optical fiber access technologies, the Ethernet passive optical network (Ethernet Passive OpticalNetwork, EPON) technology effectively utilizes the valuable resources of the existing Ethernet, and has the advantages of low cost, high bandwidth, simple maintenance and so on. Is considered to be one of the best solutions to the "last kilometer" problem. NetFPGA is a low cost open source network testing platform designed and developed by Stanford University. The platform not only has the high speed processing of hardware, but also has the flexibility of software programmable and reusable. In this paper, the existing simulation environment of EPON system is analyzed, the key technology of EPON and the application and development of NetFPGA10G platform are deeply studied, and a design scheme of PON system based on NetFPGA10G platform is put forward. The main contents of this paper are as follows: (1) the research background of EPON system and NetFPGA10G platform and the current research situation at home and abroad have been deeply investigated. This paper introduces the hierarchical model and working principle of EPON system, analyzes the existing simulation environment of EPON, and discusses the necessity of building prototype of PON system on NetFPGA10G platform. (2) the function module of NetFPGA10G data path is introduced, the data processing flow is deeply analyzed, and the AXI4-Stream bus is studied for the communication between modules. (3) according to the difference of the function between the optical line terminal (Optical Line Terminal, OLT) and the optical network unit (Optical Network Unit, ONU) in the EPON system, the design scheme is given respectively. The scheme is chosen to work on the same level as the PON system in the OSI reference model. And the structure of the most concise Reference NIC as a reference project; The modularization design idea is adopted to reduce the complexity of the function module, and the three-stage state machine is used in the programming process, which reduces the interference of the input signal to the output signal. The core processing module adopts back-end buffer mechanism to control the time slot of data transmission. This scheme uses Verilog HDL to program, combines ISE,XPS and other tools to embed the core module of OLT/ONU into the NetFPGA10G data path, realizes the up / down data path of EPON system, MPCP protocol and Ethernet exchange function. The EPON system is simulated and verified.
【学位授予单位】：河北工程大学
【学位级别】：硕士
【学位授予年份】：2014
【分类号】：TP393.11
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