面向三维高密度集成系统的多物理场耦合算法的研究与开发

发布时间：2017-12-28 19:31

本文关键词：面向三维高密度集成系统的多物理场耦合算法的研究与开发　出处：《东南大学》2016年硕士论文　论文类型：学位论文

【摘要】：随着社会的发展,汽车电子、航天工业、通讯、计算机等现代行业对功能更强、尺寸更小、集成度更高的便携式电子产品的要求愈加强烈。单层芯片结构,从DIP(双列直插式)到MCM(多芯片),面积的利用率越来越高,适用频率、可靠性也越来越高,更加方便耐用,但仍停留在二维平面结构上,无法满足现代行业的需求,因此更高密度的多层堆叠结构被提出。由于温度对芯片的影响,在单层芯片的二维结构上,随着功率密度的增大而增大,因此热管理也变的更加重要。而堆叠结构的复杂度和功率密度更高,温度对结构的影响也更大。因此,无论单芯片结构还是多芯片结构,对热管理都非常必要,需要建立准确、高效的三维传热模型。本文主要工作有：(1)以傅里叶热传导理论和热对流理论为基础,建立热阻模型。通过将芯片结构合理划分为多个区域,计算各个区域热阻,得到x、y和z的热阻总和,进而得到热源区域最高温度点的温度值和边界平均温度。由于三维温度的扩算,类似于球壁导热,故对于节点之间的温度分布,采用球壁导热的原理进行计算。最终建立了三维传热热阻网络模型的基础理论模型,包括：热源中心温度模型、温度分布模型和迭代计算法。基于三维传热热阻网络模型的基础理论模型,得到单层芯片结构热阻网络模型和多层芯片堆叠结构热阻网络模型,并分别作出相应的热阻分析图。对于对流热阻的分析,创新性的采用迭代计算的方法,来计算对流热阻对应的对流系数。(2)用ANSYS仿真验证三维传热热阻网络模型的正确性,以三维传热热阻网络模型理论计算的参数作为ANSYS建模的参数,将三维传热热阻网络模型理论计算中使用的功率和迭代得到的对流系数作为ANSYS计算模型的负载,并对二者的数据进行对比验证。结果显示在不同的生热率和热源尺寸下,热源中心最高温度点的温度值与Ansys仿真结果误差在10%以内,显示了三维传热热阻网络模型的准确性。(3)通过对专用热阻测试芯片进行实验测试,并将实验测试结果与单层芯片结构的三维传热热阻网络模型理论计算结果以及ANSYS仿真结果进行对比,得到三维传热热阻网络模型与实验测试的误差和ANSYS仿真与实验测试的误差都在10%以内,从实验的角度验证了三维传热热阻网络模型的准确性。(4)为了提高工作效率,将计算机辅助分析应用于堆叠结构的热阻网络模型建模与仿真,开发了基于Windows平台的热分析软件。该软件以VC++为主要开发工具,具有界面友好、操作简单、可移植性好,分析精度较高,对多层芯片堆叠结构的热设计有一定的辅助作用。本文建立的三维传热热阻网络模型,可适用于单层和多层芯片结构,能够快速、有效的获得相应的三维温度分布。通过ANSYS仿真软件和专用热阻测试芯片的实验测试对三维传热热阻网络模型进行了验证,证明了该热阻网络模型的正确性和有效性。在单层和多层堆叠芯片结构的设计中,该三维传热热阻网络模型对热设计有一定的参考价值。
[Abstract]:With the development of society, automotive electronics, aerospace industry, communications, computers and other modern industries are more demanding for portable electronic products with stronger functions, smaller size and higher integration. Single chip structure, from DIP (dual-in-line) to MCM (multi chip), area utilization rate is higher and higher, frequency of application, the reliability is also more and more high, more convenient and durable, but still remain in the two-dimensional plane, unable to meet the modern industry demand, so the high density multilayer stack structure is put forward. Due to the influence of temperature on the chip, the two dimensional structure of single-layer chip increases with the increase of the power density, so the heat management becomes more important. The complexity and power density of the stacked structure are higher, and the temperature has more influence on the structure. Therefore, both the single chip structure and the multi chip structure are necessary for the heat management. It is necessary to establish an accurate and efficient three-dimensional heat transfer model. The main work of this paper is as follows: (1) the thermal resistance model is established on the basis of Friyege's conduction theory and the theory of thermal convection. By dividing the chip structure into several regions, the thermal resistance of each region is calculated, and the total heat resistance of X, y and Z is obtained, and the maximum temperature point and the average temperature of the boundary area are obtained. Because the expansion of the three-dimensional temperature is similar to the heat conduction of the ball wall, the temperature distribution between the nodes is calculated by the principle of the heat conduction of the ball wall. Finally, the basic theoretical model of the three-dimensional heat transfer thermal resistance network model is established, including the temperature model of the heat source center, the temperature distribution model and the iterative calculation method. Based on the basic theoretical model of three-dimensional heat transfer and thermal resistance network model, a single chip structure thermal resistance network model and a multilayer chip stack thermal resistance network model are obtained, and the corresponding thermal resistance analysis chart is made respectively. For the analysis of the convective heat resistance, an innovative method of iterative calculation is used to calculate the convective coefficient corresponding to the convective heat resistance. (2) correct 3D thermal network heat transfer model is verified by ANSYS simulation, the three-dimensional heat transfer thermal resistance network model calculated parameters as parameters of ANSYS modeling, the convection coefficient theory of three-dimensional thermal resistance network model calculated using power and iteration as the load of the ANSYS model, and the two data contrast verification. The results show that the temperature difference between the highest temperature point of the heat source center and the Ansys simulation result is less than 10% under different heating rate and heat source size, showing the accuracy of the three-dimensional heat transfer and thermal resistance network model. (3) through the experimental test of special resistance test chip, and the theory of three-dimensional thermal resistance network model test results and single chip structure by comparing calculation results and simulation results of ANSYS, get the error and error of ANSYS simulation and experimental test of 3D thermal network heat transfer model and experimental tests are less than 10%, the accuracy of 3D the thermal resistance network model is verified from the experimental point of view. (4) in order to improve work efficiency, computer aided analysis is applied to modeling and Simulation of thermal resistance network model of stacked structure. A thermal analysis software based on Windows platform is developed. The software takes VC++ as the main development tool. It has friendly interface, simple operation, good portability and high accuracy. It has a certain auxiliary role in thermal design of multilayer chip stacking structure. The three dimensional heat transfer and thermal resistance network model can be applied to single layer and multilayer chip structure, and the corresponding three-dimensional temperature distribution can be obtained quickly and effectively. The three-dimensional heat transfer and thermal resistance network model is verified by the experimental results of ANSYS simulation software and special thermal resistance test chip, and the correctness and effectiveness of the thermal resistance network model is proved. In the design of single-layer and multi-layer stacked chip structure, the 3D heat transfer thermal resistance network model has some reference value for thermal design.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN40

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