面向SystemC的软错误敏感度分析方法

发布时间：2018-01-03 11:45

本文关键词：面向SystemC的软错误敏感度分析方法　出处：《上海交通大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着半导体制造工艺的不断进步,由粒子辐射、噪声干扰等原因引起的软错误问题日益凸显,对电路可靠性造成了越来越严重的影响。在电路设计阶段引入软错误率评估能有效提高电路可靠性指标,减少设计反复并节约开发成本。随着电路设计复杂度的不断提高以及IP复用技术的广泛应用,SystemC语言由于其优越的软硬件协同开发能力,被广泛应用于电子系统级设计,进行高层次系统建模与仿真验证。因此本文提出了一种面向SystemC电路设计的软错误敏感度分析方法。这种方法通过仿真器在系统运行过程中对系统内部电路节点进行随机故障注入并监测系统运行结果,以此评估系统软错误敏感度。首先,基于SystemC/Verilog语言等效性,通过对系统Verilog代码的改写实现测试电路的SystemC建模,并在Modelsim软件环境中使用混合仿真方法验证系统功能正确性。高层次SystemC建模能有效提高系统运行速度。其次,以系统内模块接口信号以及模块内部所有信号作为故障注入点能模拟绝大多数软错误现象,并在软错误敏感度指标中引入模块面积对系统总体软错误率的影响,可以有效提高软错误率分析精度。再者,在保证统计分析精度前提下,使用分层抽样策略对故障注入样本空间进行压缩,通过减少故障注入实验数提高仿真故障平台的运行效率。验证实验以基于OR1200处理器的最小系统的SystemC模型为测试电路,使用仿真故障注入方法以及仿真加速策略构建故障注入平台。在此基础上,使用分层抽样策略进行共计约30万次的故障注入实验,结合系统架构与统计数据分析系统各模块软错误敏感度。数据表明系统中寄存器模块对软错误最敏感,系统总体软错误率为0.0063。分析结果表明本文提出的软错误敏感度分析方法稳定有效。已有软错误敏感度研究中未考虑面积因素对系统整体软错误率的影响,本方法具有更好的评估精确度。
[Abstract]:With the continuous progress of semiconductor manufacturing process, by particle radiation, soft error problem caused by noise and other reasons has become increasingly prominent, has caused more and more serious influence on the reliability of circuit. The introduction of soft error rate evaluation can effectively improve the circuit reliability index in the circuit design, reduce repeated design and save development costs. With the wide application of circuit the increasing complexity of design and IP reuse technology, SystemC language because of its superior hardware and software collaborative development ability, has been widely used in electronic system level design, modeling and Simulation of construction of high level verification system. So this paper presents a SystemC oriented circuit design of the soft error sensitivity analysis method. By this method the simulator in the running process of the system of internal circuit nodes and random fault injection monitoring system operation results, in order to evaluate the system software Error sensitivity. First of all, based on the SystemC/Verilog language equivalence, by rewriting on the system Verilog code to achieve the test circuit of SystemC modeling, and using the hybrid simulation method for functional correctness verification system in Modelsim software environment. The high level of SystemC can effectively improve the modeling of high speed system. Secondly, the system interface module and signal module all the internal signals as the fault injection points can simulate most of the soft error phenomenon, and the soft error sensitivity index is introduced in the module area on the soft error rate of the overall effect of the system, can effectively improve the soft error rate analysis accuracy. Furthermore, the statistical analysis of the accuracy of fault injection, the sample space is compressed using stratified sampling the strategy, by reducing the number of fault injection experiments to enhance the efficiency of simulation platform. Experiments with the OR1200 processor based on the SystemC model system for testing circuit, injection method and simulation acceleration strategy constructing fault injection platform using fault simulation. On this basis, using the stratified sampling strategy a total of about 300 thousand times the fault injection experiment, combined with the system architecture and statistical data analysis system of each module of the soft error sensitivity. The data show that register module in the system sensitive to soft errors, the system soft error rate of 0.0063. analysis results show that the soft error sensitivity analysis method proposed in this paper is stable and effective. The soft error sensitivity in the area without considering the influence factors on the soft error rate of the whole system, this method has better evaluation accuracy.

【学位授予单位】：上海交通大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN305

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