高速电路PCB的信号完整性和电源完整性仿真分析

发布时间：2018-01-11 15:06

本文关键词：高速电路PCB的信号完整性和电源完整性仿真分析　出处：《西安电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着当代电子通信技术的快速发展,光刻技术以及封装技术的迅速提高,信号速率也逐渐变高。随着集成电路进入纳米级别,器件尺寸变小、集成规模变大、引脚数增加、时钟工作频率变高,电磁波长也和器件的尺寸相比拟,随之产生的信号完整性问题变得越来越不可忽略。对于十年前的低速器件,传输线可以看做是一段简单的导线,但是对于如今的高速器件,信号传播表现出了非常明显的波特性,高速信号会沿着传输线来回振荡。所以,伴随着高速电路的快速发展,高速电路下电子器件体积变小导致整个电路的布局布线变密集的问题日益严重,为了能更好的处理高速信号问题,必须要处理信号完整性带来的一系列问题。本文深入分析了信号完整性以及电源完整性这一容易在高速电路设计中被忽略的概念、作用以及原理,并结合相关理论提出了高效低成本的信号完整性、电源完整性仿真理论和方法。笔者运用PCB信号完整性仿真软件Ansoft公司的SIwave提取出封装好的PCB散射参量,之后利用IDEM软件将散射参量转换为ADS仿真工具可以读取的网表文件,和作为输入输出接口IBIS文件一起通过连接构成仿真模型进行了电源完整性中的阻抗扫描仿真和电源网络IR drop仿真。根据仿真结果制定相关的布局布线设计,并在布局布线之后采取了有效手段减小电源分配网络PDN的阻抗值和信号线压降,确保在不用修改芯片内部设计的情况下增强系统的信号完整性和电源完整性。本文基于信号完整性和电源完整性的PCB并行仿真设计流程,高效的制定并完善约束规则,优化布局布线最后保证高速电路设计的可靠性。可以提高实际PCB的质量,缩小设计改动范围和减小设计修改次数,降低设计风险,从而做到在当今高速电路设计中缩短开发周期、减少开发成本。
[Abstract]:With the rapid development of modern electronic communication technology, the rapid improvement of lithography technology and packaging technology, the signal rate also gradually becomes high. With the integrated circuit device into nano level, size, integration scale, increasing the number of pins, clock frequency becomes higher, the electric magnetic device and the wavelength is comparable to the size of the problem. The resulting signal integrity becomes more and more can not be ignored. For the low ten years ago, the transmission line can be seen as a simple wire, but for high speed devices now, signal propagation showed very obvious characteristics of the wave, the high speed signal along the transmission line back and forth oscillation. Therefore, with the rapid the development of high-speed circuit, high speed circuit of electronic devices are smaller in the layout of the whole circuit wiring becomes intensive problems become more and more serious, in order to deal with high-speed signal problems better, we must. A series of problems and signal integrity. This paper analyzes the signal integrity and power integrity that easy to be ignored in high speed circuit design concept, function and principle, and combined with the theory put forward the signal integrity of high efficiency and low cost, Power Integrity simulation theory and method. The author used PCB Signal Integrity simulation software Ansoft SIwave to extract PCB scattering parameters of a good package, then the scattering parameters conversion tool for ADS simulation netlist file can be read by IDEM software and the IBIS document as input and output interface connected together through a simulation model for the impedance scanning simulation and power network IR Power Integrity simulation drop in the simulation results. According to the related layout design, and the impedance after the wiring layout has taken effective means to reduce the power distribution network PDN The value of pressure drop and the signal line, ensure that modify the enhanced signal integrity and power integrity system chip design under the condition without parallel simulation. In this paper the design process of signal integrity and power integrity based on PCB, and efficient to develop and improve the rules, optimization layout finally ensure the reliability of high speed circuit design can be improved. The quality of the actual PCB, narrowing the scope and design changes to reduce design times, reduce design risk, so as to shorten the development cycle in the high speed circuit design, reduce the cost of development.

【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN41

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