HEVC解码器在异构计算平台上的设计及节能算法研究

发布时间：2018-01-12 04:23

本文关键词：HEVC解码器在异构计算平台上的设计及节能算法研究　出处：《山东大学》2017年硕士论文　论文类型：学位论文

更多相关文章： HEVC解码器 CPU GPU DVFS 视频缓冲区

【摘要】：随着网络视频业务的飞速发展,视频流量在互联网中逐渐占据主导地位。一项名为思科可视化网络指数的计划中指出:到2020年,每秒将会有100万分钟的视频内容流经网络,全球IP视频流量占所有IP流量(企业和消费者)的比例增加到82%。与此同时,高清和超高清视频越来越受到人们的关注与推崇。下一代视频编码标准High Efficiency Video Coding(HEVC/H.265)相比于现在广泛采用的AVC/H.264视频编码标准,在达到相同视频质量要求的前提下,可以实现更高的压缩比。这主要是由于在HEVC视频编码标准中新增了许多有助于提高编码性能的压缩技术,如可变大小的编码树单元、独立并行编码单元Tile以及多层次环路滤波等技术。然而,这些新技术在提高HEVC标准编码效率的同时,也增加了视频编解码实现的复杂度。跟据论文统计,在相同编码质量的前提下,HEVC标准编码复杂度提高了 5.2倍,相应的解码器复杂度提高了 2.1倍。目前,一些顶端的消费电子厂商通过ASIC硬件电路实现了对HEVC编解码的支持,如Intel、Apple、NVIDIA、AMD、华为等。然而,由于HEVC解码器的计算复杂度较高,对于电池供电并且计算能力有限的嵌入式设备(移动手机、平板等),基于软件实现HEVC的实时解码仍然是一个重要的科研课题。本文实现了 HEVC官方测试软件HM的解码器并行化,并将其移植到低功耗的具有CPU和GPU的异构多处理器片上系统(heterogeneous multiprocessor System-on-Chip)。大量的实验数据表明:GPU的并行架构很好的隐藏了解码器的访存延时,相对缩小了视频帧之间处理时间的差异。并且,处理各视频帧的工作量和一个可以在解码过程中方便获取到的编码参数呈现出一致的变化规律。根据本文后面章节说明的实验过程及相关实验结论,我们提出了 CPU和GPU解码下一帧的工作量预测算法。基于预测得到的工作量,提出了运行于实验平台的userspace调控器下的面向具体应用的CPU和GPU协同DVFS策略。本文提出的DVFS策略有效节省了解码HEVC视频的能量消耗。此外,准确的工作量预测算法使得一个很小的帧缓冲区即可保证视频的实时解码,进一步降低了系统的整体开销。
[Abstract]:With the rapid development of network video services, video traffic is gradually dominating the Internet. A plan called Cisco Visual Network Index points out: by 2020. There will be 1 million minutes of video content flowing through the network per second, and global IP video traffic will increase to 82 percent of all IP traffic (businesses and consumers). HD and Ultra HD video are becoming more and more popular. The next generation video coding standard, High Efficiency Video coding. HEVC / H.265) compared with the AVC/H.264 video coding standard, which is widely used now. With the same video quality requirement, higher compression ratio can be achieved. This is mainly due to the addition of many compression techniques to improve the performance of HEVC video coding standards. Such as variable-size coding tree unit, independent parallel coding unit (Tile) and multi-level loop filter, etc. However, these new techniques can improve the efficiency of HEVC standard coding at the same time. It also increases the complexity of video coding and decoding. According to the statistics of the paper, the coding complexity of HEVC standard is increased 5.2 times under the same coding quality. The complexity of the corresponding decoders has increased by 2.1 times. Currently, some top consumer electronics manufacturers, such as Intel Apple, support HEVC coding and decoding via ASIC hardware circuits. However, due to the high computational complexity of the HEVC decoder, embedded devices (mobile phones, tablets, etc.) with limited computing power and battery power. The implementation of real-time decoding of HEVC based on software is still an important research topic. This paper implements the parallelization of HEVC official test software HM decoder. And porting it to a low-power heterogeneous multi-processor system with CPU and GPU. Heterogeneous multiprocessor System-on-Chip). A large number of experimental data show that the parallel architecture of the: GPU can hide the memory access delay of the decoder very well. The difference in processing time between video frames is relatively reduced. And. The workload of processing each video frame and a coding parameter that can be easily obtained in the decoding process show a consistent change rule. According to the experimental process and related experimental conclusions described in the later chapters of this paper. We propose a workload prediction algorithm for the next frame decoded by CPU and GPU. In this paper, an application-oriented CPU and GPU cooperative DVFS strategy based on the userspace governor running on the experimental platform is proposed. The DVFS strategy proposed in this paper effectively saves decoding HEVC. The energy consumption of the video. The accurate workload prediction algorithm enables a small frame buffer to ensure the real-time decoding of the video and further reduces the overall overhead of the system.
【学位授予单位】：山东大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN919.81;TN764

【相似文献】