FPGA物理不可克隆函数及其实现技术

发布时间：2018-01-21 04:53

  本文关键词： 物理不可克隆函数 FPGA 硬件安全　出处：《计算机辅助设计与图形学学报》2017年09期 　论文类型：期刊论文

【摘要】：作为一种重要的硬件安全原语,物理不可克隆函数(PUF)利用集成电路不可控的制造工艺差异生成具有唯一标志的签名数据,以其特有的轻量级和防篡改属性在芯片认证、随机数产生器和密钥生成等硬件安全领域具有极大优势.现场可编程门阵列(FPGA)应用因其对电路设计可自由灵活配置的特点,自身的安全性和可靠性问题越来越受到关注.PUF技术可以从硬件层面为FPGA电路提供有效安全保护,以较少的开销获得更强的抵御安全风险能力.文中系统地分析了基于FPGA PUF的模型和相应的电路结构,总结和分析FPGA PUF电路结构在随机性、稳定性和资源消耗等性能方面的优化策略,FPGA PUF技术的主要检验评价方法以及性能对比;介绍了FPGA PUF在硬件安全领域中的典型应用.最后对FPGA PUF面临的挑战和未来趋势进行了展望.
[Abstract]:As an important hardware security primitive, the physical non-clone function PUFs generate unique signature data by using the uncontrollable manufacturing process difference of integrated circuits. With its unique lightweight and tamper-proof properties in the chip authentication. The application of FPGA (Field Programmable Gate Array) has great advantages in hardware security such as random number generator and key generation because of its flexible configuration for circuit design. More and more attention has been paid to the security and reliability of its own. PUF technology can provide effective security protection for FPGA circuits from the hardware level. The model based on FPGA PUF and the corresponding circuit structure are analyzed systematically. The optimization strategy of FPGA PUF circuit structure in randomness, stability and resource consumption is summarized and analyzed. The main test and evaluation methods and performance comparison of PUF technology are presented. This paper introduces the typical application of FPGA PUF in the field of hardware security. Finally, the challenges and future trends of FPGA PUF are prospected.
【作者单位】： 中国矿业大学(北京)机电与信息工程学院;清华大学计算机科学与技术系;
【基金】：国家自然科学基金(61176035)
【分类号】：TN791
【正文快照】： 听、伪造和篡改等威胁.传统的加密方法由于计算量大需要耗费更多资源,因此轻量级加密与认证技术的探索对于无线传感器等资源受限物理设备具有重大意义.逻辑门电路是数字电路中的重要组成部分,由于集成电路制造工艺过程的特性,每一个逻辑门电路的阈值电压以及氧化层厚度都不尽，

本文编号：1450527