基于双极型工艺的低噪声运算放大器的设计

发布时间：2018-01-28 03:59

本文关键词： 运算放大器双极型工艺低噪声等效输入噪声电压　出处：《电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：运算放大器在如今的电路系统中随处可见,并且现在的运算放大器大都是具有特殊性能的专用运放。运放对微弱的信号非常敏感,很容易被环境中或者内部的噪声信号所影响,当噪声的数量级与有用信号的数量级相同时会对输出信号造成严重的影响。那么运放的噪声特性就显得相当重要,因此降低运放的噪声具有非常重大的意义。同时双极型工艺相比于MOS工艺,具有较小的失调、较强的电流驱动能力以及更好的噪声特性等,所以绝大部分高精度运放都采用双极型工艺。本文主要致力于设计一款基于双极型工艺的低噪声运放。从工艺、器件、电路结构、电路参数四个角度介绍了运放低噪声的实现方法;输入级运用电阻负载差分对结构和偏置电流消除电路以减小运放的噪声电压和输入偏置电流、中间级运用折叠式共射共基结构以提高运放的增益、输出级运用双缓冲输出结构以提高运放的带负载能力和输出电压摆幅;设计合适的基准电流源以及偏置电路为运放提供合理的偏置电压;设计典型的密勒补偿电路以及前馈补偿电路以提高运放的稳定性;文章详细推导了运放的各项主要参数如等效输入噪声电压、输入失调电压、开环增益、转换速率等。本课题采用上海先进3μm的Bipolar工艺,运用HSPICE软件仿真,结果表明,当供电电压为±15 V时,在1 kHz时的等效输入噪声电压为2.465 nV/Hz;输入失调电压为0.0146 mV,开环增益达到131.3 dB,共模抑制达到170 dB,单位增益带宽为6.06 MHz,相位裕度为51.7°,转换速率为2.61 V/μs。在版图的设计过程中运用一层金属布线,最终通过版图验证,版图面积为4100μm×2590μm。因此,本文所设计的运放不仅具有极低的噪声,在其他方面也表现出色,基本达到设计指标。
[Abstract]:Operational amplifiers can be seen everywhere in today's circuit systems, and most of them are special operational amplifiers with special performance. Operational amplifiers are very sensitive to weak signals. It is easy to be affected by the noise signal in the environment or inside, when the order of magnitude of the noise is the same as the order of magnitude of the useful signal, it will have a serious impact on the output signal. Therefore, reducing the noise of operational amplifier is of great significance. At the same time, compared with MOS process, bipolar process has smaller misalignment, stronger current driving ability and better noise characteristics. Therefore, most of the high-precision operational amplifier uses bipolar technology. This paper mainly focuses on the design of a bipolar process based on low-noise operational amplifier. From the process, devices, circuit structure. The realization method of low noise operation amplifier is introduced from four aspects of circuit parameters. The input stage uses the resistor load difference to eliminate the structure and the bias current to reduce the noise voltage and the input bias current of the operational amplifier, and the middle stage uses the foldable common base structure to improve the gain of the operational amplifier. The output stage uses a double buffer output structure to improve the load capacity and output voltage swing of the operational amplifier. A suitable reference current source and a bias circuit are designed to provide a reasonable bias voltage for the operational amplifier. The typical Miller compensation circuit and feedforward compensation circuit are designed to improve the stability of operational amplifier. The main parameters of operational amplifier, such as equivalent input noise voltage, input offset voltage, open-loop gain, conversion rate and so on, are derived in detail. Shanghai advanced 3 渭 m Bipolar technology is adopted in this paper. The simulation results with HSPICE software show that the equivalent input noise voltage at 1 kHz is 2.465nV / Hz when the supply voltage is 卤15V; The input offset voltage is 0.0146 MV, the open-loop gain is 131.3 dB, the common-mode suppression is 170 dB and the unit gain bandwidth is 6.06 MHz. The phase margin is 51.7 掳and the conversion rate is 2.61 V / 渭 s. A layer of metal wiring is used in the layout design process, which is verified by layout. The layout area is 4100 渭 m 脳 2590 渭 m. Therefore, the operational amplifier designed in this paper not only has very low noise, but also performs well in other aspects.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN722.77

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