一款低功耗蓝牙SoC的设计与验证

发布时间：2018-02-03 14:29

本文关键词： SoC 低功耗 FPGA　出处：《西安电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着电子技术的发展,越来越多的智能设备出现在人们的生活中。物联网的概念提出将这些智能设备相互连接,从而更好地提高人们的生活品质,这对无线通信芯片提出了需求。同时智能设备也向着小型化和集成化的方向发展,对低功耗提出了一定要求。本文基于以上背景设计了一款低功耗蓝牙SoC芯片XD1336,并对其进行了仿真验证与FPGA验证。文章简要介绍了低功耗蓝牙SoC的发展背景和数字系统的设计流程。下面就流程中设计与验证两个步骤,结合低功耗蓝牙SoC进行了阐述。论文首先对整个芯片的架构进行了描述,简要介绍了系统各个模块的功能。之后就笔者在项目中参与设计和验证的工作进行了详细介绍。包括调制解调模块的原理以及数字实现的具体方案、RF控制模块的设计、系统的低功耗模式以及实现的具体技术细节。其中低功耗模式介绍了Sleep、Deep Sleep和Shutdown三种模式,并分析了他们的应用环境。实现低功耗的具体细节涉及了门控时钟、隔离单元以及CPF文件的应用。接下来对上述部分进行了仿真,以验证设计是否符合要求。这一部分使用计算机仿真软件,对数字逻辑进行仿真并产生波形,并观察信号波形来确认设计是否实现了预期的功能。这一部分首先介绍了仿真平台的搭建,之后依次分析了调制解调模块、RF控制模块以及低功耗模式的仿真波形。从仿真波形可以看出,调制解调模块可以正常地处理信号,并可以与测试模型通信;RF控制模块信号的时序与设计要求一致;低功耗模式下相关的信号跳变正常,说明系统进入了低功耗模式。这一部分通过仿真验证,得出了系统功能符合设计要求的结论。然后介绍了利用FPGA补充验证系统功能的工作。此处首先介绍了FPGA与CPLD的差别,阐明了选择FPGA作为验证平台的理由。接着对搭建的FPGA验证平台做了简要描述。之后提出了进行FPGA验证平台与PTS Dongle通信测试,同时通过内嵌式分析逻辑分析仪抓取的重要信号的波形的验证方案。经过测试验证,FPGA验证平台可以和PTS Dongle正常通信,逻辑分析仪抓取的信号也与仿真中一致,说明设计通过了FPGA验证,系统功能正常无误。最后对全文进行了回顾与总结。指出了本人工作中仍存在的不足之处,并对未来做出了展望。
[Abstract]:With the development of electronic technology, more and more intelligent devices appear in people's life. The concept of Internet of things proposes to connect these intelligent devices to each other, so as to improve people's quality of life better. At the same time, intelligent devices are developing towards miniaturization and integration. In this paper, a low power Bluetooth SoC chip XD1336 is designed based on the above background. The paper introduces the development background of low-power Bluetooth SoC and the design process of digital system. The following two steps are the design and verification of the process. In this paper, the low power Bluetooth SoC is introduced. Firstly, the architecture of the whole chip is described. After a brief introduction of the functions of each module of the system, the author in the project involved in the design and verification of the work is described in detail, including the principle of modulation and demodulation module and digital implementation of the specific scheme. The design of RF control module, the low power mode of the system and the technical details of its implementation. The low power mode introduces three modes of deep Sleep and Shutdown. And analyzed their application environment. The implementation of low-power details involved the application of gated clock, isolation unit and CPF file. In order to verify whether the design meets the requirements. This part uses computer simulation software to simulate the digital logic and generate waveform. And observe the signal waveform to confirm whether the design has achieved the expected function. This part first introduces the construction of the simulation platform, and then analyzes the modulation and demodulation module in turn. RF control module and simulation waveform of low power mode. From the simulation waveform, it can be seen that the modulation and demodulation module can process the signal normally, and can communicate with the test model; RF control module signal timing and design requirements are consistent; The related signal jump is normal in low-power mode, which indicates that the system has entered low-power mode. This part is verified by simulation. A conclusion is drawn that the function of the system meets the design requirements. Then the work of using FPGA to supplement and verify the system function is introduced. The difference between FPGA and CPLD is introduced here first. The reason for choosing FPGA as the verification platform is explained. Then the FPGA verification platform is briefly described. Then, the FPGA verification platform and PTS are proposed. Dongle communication test. At the same time, the verification scheme of the waveform of the important signal captured by the embedded analysis logic analyzer is adopted. After testing, the verification platform can communicate with PTS Dongle normally. The signal captured by the logic analyzer is also consistent with the simulation, which shows that the design has passed the FPGA verification. The function of the system is normal and correct. Finally, the paper reviews and summarizes the full text, points out the shortcomings of my work, and makes a prospect for the future.
【学位授予单位】：西安电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402

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