电力线载波自动抄表芯片模拟发送端的设计

发布时间：2018-02-04 13:40

本文关键词： 电力线载波自动抄表发送端数模转换器线驱动　出处：《湘潭大学》2015年硕士论文　论文类型：学位论文

【摘要】：近年来,借助物联网技术高速发展的东风,电力事业在蓬勃向前。然而,包括电卡充值系统、掌上抄表计算机、无线远程抄表在内的现存的用电统计与管理手段都并非实惠与全面。作为一种可供选择的手段,电力线载波通信进入了人们的视野。以低压供电线充当通信介质,具有机械强度高、可靠性好以及分布广泛等特点,具有优秀的实用价值,并将给电力公司带来可观的经济效益。现阶段基于低压电力线载波通讯的自动抄表系统中所使用的多数为国外芯片,在增加了居民用户和电力企业的经济压力的同时,也给国家电力系统的安全带来风险。可以说底层电路芯片已经成为我国低压电力线载波通讯自动抄表系统的制擎。本文根据课题需要,分析了电力线载波智能抄表技术的基本原理,研究了自动抄表芯片中的基本模块,详细设计了基于电力线载波自动抄表芯片模拟发送端电路,包括数字模拟转换器电路(DAC),滤波器(Filter),线驱动器(Line Driver)三个模块。所做的设计工作基于SMIC 0.18μm 1P6M CMOS工艺。采用10 bit分段式电流舵DAC将数字信号转换成模拟信号,动态参数后仿真结果为SNDR=61.3 dB,SNR=61.55 dB,THD=-74 dB,SFDR=76.35 dB,ENOB=9.89 bit,静态参数差分输出DNL=0.18719 LSB,INL=0.17187 LSB。采用3阶切比雪夫2型低通滤波器实现对DAC转换的模拟信号的滤波和平滑,其低频增益为-765 mdB,截止频率为521 KHz@3 d B,阻带衰减起始频率为803 KHz,阻带衰减为-20.9 dB。并通过由预放大级和驱动级构成的线驱动电路对信号进行摆幅可调和功率放大输出,在低至几个欧姆的负载条件下,其单端输出摆幅为2 V,最大输出电流600 mA时,总谐波失真小于-60 d B。以上指标显示,所设计的发送端通路不仅实现了数模转换、低通滤波和功率放大的功能,而且保证了信号通路具有良好的线性度特性。最后,对发送端电路进行了版图实现,为了保证良好的性能,特别考虑了电流舵DAC以及线驱动电路功率管的版图设计。
[Abstract]:In recent years, with the rapid development of the Internet of things technology, the power industry is booming. However, it includes card charging system, handheld meter reading computer. The existing power statistics and management methods, including wireless remote meter reading, are not affordable and comprehensive. Power line carrier communication has entered people's field of vision. With the characteristics of high mechanical strength, good reliability and wide distribution, the low voltage power supply line is used as the communication medium. It has excellent practical value. And it will bring considerable economic benefits to the power company. At this stage, most of the automatic meter reading system based on low-voltage power line carrier communication is used by foreign chips. At the same time, it increases the economic pressure of residents and electric power enterprises. It can be said that the underlying circuit chip has become the system of low-voltage power line carrier communication automatic meter reading system. The basic principle of intelligent meter reading technology based on power line carrier is analyzed, the basic module of automatic meter reading chip is studied, and the analog transmitter circuit based on power line carrier automatic meter reading chip is designed in detail. Include digital analog converter circuit DACU, filter filter. Line driver Line driver). Three modules. The design is based on SMIC 0.18 渭 m 1P6M CMOS process. 10 bit segmented current rudder DAC is used to convert digital signal into analog signal. The simulation results after dynamic parameters are as follows: 61.55 dBU THD -74 dB SFDR is 76.35 dB. ENOB=9.89 bit. static parameter differential output DNL=0.18719 LSB. INL=0.17187 LSB.Three order Chebyshev 2 low-pass filter is used to filter and smooth the analog signal converted by DAC. Its low frequency gain is -765 mdB. The cut-off frequency is 521 KHz@3 dB and the initial frequency of stopband attenuation is 803 KHz. The stopband attenuates to -20.9 dB, and the signal is amplified by a linear drive circuit composed of a preamplifier stage and a drive stage, which can amplify the signal in amplitude and harmonic power, under load conditions as low as several ohms. When the output swing is 2 V and the maximum output current is 600 Ma, the total harmonic distortion is less than -60 dB. Low pass filter and power amplification function, and ensure that the signal path has good linearity. Finally, the layout of the transmitter circuit is implemented to ensure good performance. Especially, the layout design of the current rudder DAC and the power transistor of the linear drive circuit is considered.
【学位授予单位】：湘潭大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TM933.4;TN402

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