用于超低频信号测量的高精度低功耗增量式模数转换器

发布时间：2018-03-07 07:31

本文选题：超低频　切入点：增量式　出处：《西安交通大学学报》2017年06期 　论文类型：期刊论文

【摘要】：针对超低频信号测量装置对模数转换器(ADC)的高精度、低功耗和小面积要求,提出了一种带有斩波稳零(CHS)和自校准技术的增量式模数转换器(I-ADC)。I-ADC带有复位操作,可避免超低频信号带来的模式噪声。为了尽量降低功耗和芯片面积,I-ADC采用一阶结构,并通过增加一定的转换时间来实现14bit的转换精度。该I-ADC采用斩波稳零技术来消除运放低频噪声和失调对其精度的影响,I-ADC的系统失调则采用上电自校准技术来消除。采用DongBu 0.5μm BCD工艺完成了I-ADC电路及其调制器版图的设计。仿真结果表明:在-156.25~156.25 mV输入范围内,I-ADC转换误差的绝对值最大为21μV,微分非线性误差的绝对值最大为0.12bit,积分非线性误差的绝对值最大为0.21bit,调制器的平均电流消耗仅为20μA;调制器的版图面积仅为150μm×310μm;所设计的I-ADC可满足锂电池电量计等超低频测量系统所需的14bit转换精度,并具有显著的低功耗和小面积优势。
[Abstract]:Aiming at the requirement of high precision, low power consumption and small area for ADCs of ultra-low frequency signal measuring device, an incremental ADC with chopping stability and self-calibrating technique is presented in this paper, which has reset operation. Mode noise caused by ultra-low frequency signals can be avoided. In order to minimize power consumption and chip area, the I-ADC adopts a first-order structure. The I-ADC uses chopped zero stabilization technology to eliminate the low frequency noise of operational amplifier and the influence of misalignment on its accuracy. The system misalignment of I-ADC is eliminated by the self-calibration technique of power on. The I-ADC circuit and its modulator layout are designed by using DongBu 0.5 渭 m BCD process. The simulation results show that the maximum conversion error of I-ADC is 21 渭 V in the input range of -156.25 渭 m BCD, and the absolute value of differential nonlinear error is 0.12 bit. integral. The maximum absolute value of the nonlinear error is 0.21 bit, the average current consumption of the modulator is only 20 渭 A, and the layout area of the modulator is only 150 渭 m 脳 310 渭 m. And has the remarkable low power consumption and the small area superiority.
【作者单位】：西安交通大学微电子学院;
【基金】：国家自然科学基金资助项目(61474092) 陕西省科技计划资助项目(2014K05-14)
【分类号】：TN792

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