基于PSP扩展的SOI MOSFET模型研究

发布时间：2018-03-15 02:14

本文选题：SOI　切入点：MOSFET　出处：《杭州电子科技大学》2015年硕士论文　论文类型：学位论文

【摘要】：随着器件特征尺寸的减小,体硅CMOS遇到了许多技术上的问题和挑战,短沟道效应(SCE)和二极管泄漏电流的增加使得体硅技术很难遵循摩尔定律继续向前发展。相比于体硅CMOS技术,全介质隔离技术使得SOI拥有众多的优点,如消除了体硅CMOS的闩锁效应、功耗低等。电路仿真是IC电路设计的基础,要求器件有精确的模型。虽然BSIMSOI被认定为工业SOI MOSFET标准模型,但是其物理意义并不明确且参数众多,影响模型提取的效率,无法满足用户的需求。本文对SOI MOSFET的器件结构、工作机理和器件模型进行深入分析,在体硅标准模型PSP103的基础上,考虑SOI特有的物理效应,研究适用于SOI MOSFET的表面势模型。文章的主要工作如下:(1)详细阐述了SOI MOSFET的器件结构和工作机理,深入分析了SOI MOSFET器件特性,同时比较了现有SOI MOSFET模型的优缺点,为后续SOI MOSFET模型研究奠定基础。(2)在深入研究体硅模型PSP103的基础上,结合SOI特有的衬底效应、浮体效应、自热效应、体接触模型和背栅效应,建立了适用于SOI MOSFET的PSP扩展模型。(3)基于现有的测试条件和器件工艺,采用合理的直流特性、交流特性测试方案,对SOI MOSFET进行了测试。(4)基于DC、CV测试数据,对PSP扩展模型的提取流程进行优化,提出适合PSP扩展模型的Local-Global参数提取流程,建立了Global直流模型。(5)分析讨论SOI MOSFET射频模型,研究射频寄生特别是衬底网络参数的提取方法。选择合适的小信号S参数的测试方案,从SOI MOS Varactor中提取衬底的寄生参数,根据实际工艺和提取的寄生参数,研究衬底的寄生参数与尺寸的缩放关系。根据提出的衬底寄生参数与尺寸的缩放关系,计算并直接应用到SOI MOSFET中,再进行剩余寄生参数的提取,对提取的参数进行尺寸缩放研究,建立了Global射频模型。(6)通过对比直流MOSFET和RF MOSFET的测试数据和仿真结果,验证了基于PSP扩展的SOI MOSFET射频可缩放模型的可行性和准确性。
[Abstract]:With the reduction of device characteristic size, bulk silicon CMOS has encountered many technical problems and challenges. The increase of short channel effect (SCE) and diode leakage current makes it difficult for bulk silicon technology to continue to develop according to Moore's law. All-dielectric isolation technology makes SOI have many advantages, such as eliminating latch effect of bulk silicon CMOS, low power consumption and so on. Circuit simulation is the basis of IC circuit design and requires precise model of device. Although BSIMSOI is recognized as the standard model of industrial SOI MOSFET, But its physical meaning is not clear and the parameters are numerous, which affects the efficiency of model extraction and can not meet the needs of users. In this paper, the device structure, working mechanism and device model of SOI MOSFET are deeply analyzed. Considering the specific physical effects of SOI, the surface potential model suitable for SOI MOSFET is studied. The main work of this paper is as follows: 1) the structure and working mechanism of SOI MOSFET are described in detail, and the characteristics of SOI MOSFET devices are deeply analyzed. At the same time, the advantages and disadvantages of the existing SOI MOSFET model are compared, which lays a foundation for the further study of the SOI MOSFET model. (2) based on the in-depth study of the bulk silicon model PSP103, combined with the specific substrate effect, floating body effect, self-heating effect, volume contact model and back-gate effect of SOI. The PSP extension model for SOI MOSFET is established. Based on the existing test conditions and device technology, the SOI MOSFET is tested by using reasonable DC characteristic and AC characteristic test scheme, and the SOI MOSFET is tested based on the CV test data. The extraction process of PSP extension model is optimized, the extraction flow of Local-Global parameters suitable for PSP extension model is proposed, and the Global DC model. 5) the SOI MOSFET radio frequency model is analyzed and discussed. This paper studies the extraction method of RF parasitism, especially the parameters of substrate network, selects the appropriate test scheme of small signal S parameters, extracts the parasitic parameters of substrate from SOI MOS Varactor, and extracts the parasitic parameters according to the actual process and the extracted parasitic parameters. The relation between parasitic parameter and size scaling of substrate is studied. According to the scaling relation between parasitic parameter and size, the parasitic parameter is calculated and directly applied to SOI MOSFET, and then the remaining parasitic parameter is extracted. The dimension scaling of the extracted parameters is studied, and the Global RF model. 6) the feasibility and accuracy of the SOI MOSFET RF scalable model based on PSP extension are verified by comparing the test data and simulation results of DC MOSFET and RF MOSFET.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386

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