自举驱动式多路输出同步整流芯片的设计

发布时间：2018-03-25 08:16

本文选题：同步整流　切入点：多路输出　出处：《西安科技大学》2017年硕士论文

【摘要】：锂电池具有单体输出电压范围大、循环寿命长、体积小等优点,被广泛用于可随身携带装备的主要储能装置。为了满足缩短充电时间、并行可控充电、保证电池安全、提高充电效率等要求,可以选用串联锂电池组并行充电系统。因为反激变换器具有结构简单、体积小、电气隔离等特点,可以采用三路输出级联的反激变换器并行输出的方式进行电池充电。为了提高效率降低损耗,系统需采用同步整流技术,即使用通态电阻低、输入阻抗高的MOSFET来代替二极管进行整流。为了驱动输出端级联的三路反激变换器中三个整流MOSFET,设计了一款带自举驱动的多路输出同步整流芯片。所设计的驱动芯片具有三路独立的输出,可以同时驱动三路串行连接的同步整流管,并且可以实现自动停充,每一路驱动都具有自举功能。驱动芯片具有16个引脚,被分为五类,分别为供电电源引脚、实现自举功能的引脚,检测变压器各个副边绕组电压的引脚、停充控制引脚和驱动波形输出引脚。驱动芯片每一路都包括两个比较器、一个PWM控制模块和一个自举控制模块。停充控制引脚检测电池的端电压,当电池端电压达到额定电压值时,就关断该路同步整流管驱动波形的输出,停止对该组电池进行充电。为了使电源系统的电路组成简单,芯片的驱动方式采用电压自驱动方式,通过检测功率MOSFET漏-源电压VDS来产生栅极驱动信号,该驱动方式与原边的开关信号无关。对芯片的每个组成电路进行了参数设计和功能仿真。基于Cadence平台,采用CMOS工艺模型,使用Spectre对自举驱动式多路输出同步整流芯片进行系统级仿真验证,最后完成了芯片的版图设计,并通过DRC(Design Rule Check)和LVS(Layout Versus Schematics)检查,验证了所设计的芯片版图的正确性。
[Abstract]:Lithium battery has the advantages of large output voltage range of single cell, long cycle life, small volume and so on. It is widely used in main energy storage device of portable equipment. In order to improve the charging efficiency, we can choose the parallel charging system of series lithium battery pack, because the flyback converter has the characteristics of simple structure, small size, electrical isolation, etc. In order to improve the efficiency and reduce the loss, the synchronous rectifier technology is used in the system, even if the on-state resistance is low, the three-output cascaded flyback converter can be used to charge the battery in parallel. In order to drive three rectified MOSFETs in three-channel flyback converter with cascade output, a multi-output synchronous rectifier chip with bootstrap drive is designed. The chip has three independent outputs, It can drive synchronous rectifier tube with three serial connection at the same time, and can automatically stop charging. Each drive chip has bootstrap function. The drive chip has 16 pins, which are divided into five categories, respectively, power supply pin. The bootstrap pin, the pin that detects the voltage of each side winding of the transformer, the stop-charge control pin and the drive waveform output pin. Each drive chip consists of two comparators, A PWM control module and a bootstrap control module. The stop charge control pin detects the terminal voltage of the battery. When the terminal voltage of the battery reaches the rated voltage, the output of the synchronous rectifier drive waveform is turned off. In order to make the circuit composition of the power system simple, the drive mode of the chip adopts the voltage self-drive mode, and the gate drive signal is generated by detecting the power MOSFET drain source voltage VDS. The driving mode is independent of the switch signal of the original edge. The parameter design and functional simulation of each component circuit of the chip are carried out. Based on the Cadence platform, the CMOS process model is adopted. The system level simulation of bootstrap drive multiplex output synchronous rectifier chip is carried out by using Spectre. Finally, the layout design of the chip is completed, and the correctness of the chip layout is verified by DRC(Design Rule Checkand LVS(Layout Versus schematicscheck.
【学位授予单位】：西安科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TM461;TN402

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