基于FPGA的故障注入技术的研究

发布时间：2018-03-25 22:24

本文选题：故障注入　切入点：现场可编程逻辑门阵列　出处：《哈尔滨工业大学》2015年硕士论文

【摘要】：近年来,FPGA呈现出迅猛发展的态势,广泛应用于航天、航空、金融等国防、民生领域。然而由于自身构造的原因,使其极容易在各种复杂的环境中发生故障,因此这些领域的专用计算机都会配有相应的容错系统。而为了验证这些系统的可靠性与容错性,则需要专门的故障注入工具进行精确而实时的在线注入。这便是本文研究的重点。本文针对当前主流的SRAM型FPGA进行了简单的分析,指出了其容易发生的单粒子翻转软错误与单粒子闩锁的硬错误。将FPGA系统划分为已知源码的白盒目标系统与未知源码的黑盒目标系统。针对前者,通过分析当前主流的代码修改技术,决定采用支持突变技术的分支语句修改策略,借助硬件描述语言,将故障从门级传播到I/O管脚。针对黑盒目标系统,先简要分析了传统硬件及各种总线故障注入的优缺点,然后针对1553B总线,介绍了其总线的特性,并基于这些特性提出了接口模拟的故障注入方案,主要包括硬件接口与协议接口,利用FPGA在总线传播过程中引入故障。本文依据这两种技术,均开发了一套故障注入工具。支持注入固定0、固定1、翻转等故障类型。在FPGA内部,支持最多16个信号的故障叠加与触发;在1553B总线传播过程中,支持注入位置包括同步头、奇偶校验位、数据位,并可同时对数据字、命令字、状态字进行注入。最后本文使用设计的故障注入工具,验证了控制系统与总线的容错性能,成功注入了故障。得出结论:针对不同的FPGA系统,无论是在系统内部添加注入单元还是在模拟接口处修改信号,均可实现故障的注入。
[Abstract]:In recent years, FPGA has shown a rapid development, widely used in aerospace, aviation, finance and other areas of national defense, people's livelihood. However, due to the reasons of its own structure, it is easy to fail in various complex environments. Therefore, specialized computers in these fields will be equipped with corresponding fault-tolerant systems. In order to verify the reliability and fault-tolerance of these systems, This is the focus of this paper. This paper makes a simple analysis of the current mainstream SRAM type FPGA. The paper points out that the soft error of single particle flip and the hard error of single particle latch occur easily. The FPGA system is divided into the known source code white box target system and the unknown source black box target system. By analyzing the current mainstream code modification techniques, we decide to adopt the branch statement modification strategy which supports the mutation technique, and with the help of hardware description language, we can spread the fault from the gate level to the I / O pin, aiming at the black box target system. In this paper, the advantages and disadvantages of traditional hardware and various bus fault injection are analyzed briefly, then the characteristics of 1553B bus are introduced, and based on these characteristics, a fault injection scheme of interface simulation is proposed. It mainly includes hardware interface and protocol interface, using FPGA to introduce fault in the process of bus propagation. According to these two technologies, a set of fault injection tools are developed in this paper, which support injection fixed 0, fixed 1, flip and other fault types. During the 1553B bus propagation, the injection position includes synchronous head, parity check bit, data bit, and can be simultaneously used for data word and command word. Finally, the fault tolerant performance of the control system and the bus is verified by using the designed fault injection tool, and the fault is successfully injected. The conclusion is as follows: for different FPGA systems, The fault injection can be realized either by adding the injection unit inside the system or modifying the signal at the analog interface.
【学位授予单位】：哈尔滨工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791

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