基于FPGA的软件无线电板卡研究与实现

发布时间：2018-04-20 08:38

本文选题：软件无线电 + 信号汇聚　；参考：《北京邮电大学》2015年硕士论文

【摘要】：移动通信技术经过了这几十年的发展,已经经过了3G时代。目前LTE(Long Term Evolution,长期演进)已经开始商用。移动通信网络用户不断增加,用户数据流量不断增加,通信速率也随着技术的变革不断提升,给目前的无线移动通信网络带来功耗提高、成本增加等巨大挑战。采用软件无线电技术的新型基站平台,其功耗和成本较传统的基站平台有大幅的降低,并且还具有高性能、可扩展、稳定性好等优点。这使得基于通用处理器的软件无线电技术成为研究热点,并且逐渐成为实现LTE的未来基站的最有潜力的技术。本文的工作集中于软件无线电平台中信号汇聚板的研究和硬件实现展开。本文对软件无线电的系统架构作了具体的分析,并对能完成该功能的芯片作了性能对比。综合考虑成本、可靠性、实现复杂度等因素,最终确定使用Virtex-6XC6VLX130T型号FPGA作为核心板卡——信号汇聚板的处理器。满足了系统硬件平台,数据速率要求。最后,本文提出了信号汇聚板的具体实现目标。本文进一步对信号汇聚板的各个功能电路进行详细的研究与设计,主要工作包括PCI-Express金手指设计、时钟电路设计、电源模块设计、QDR和DDR3的设计、子板接口设计、Flash配置电路设计、复位电路设计、高速串行接口电路等。在此基础上,本文对信号汇聚板上的关键信号进行了信号完整性的分析,主要包括GTX信号、RocketIO信号、高速时钟信号,为硬件PCB布局布线提供了指导性参考,保证板卡稳定性。最后对软件无线电系统进行了测试验证,主要工作包括板卡关键模块以及信号汇聚板与子板之间的联调,达到设计目标。
[Abstract]:After decades of development, mobile communication technology has passed through the 3G era. At present, LTE(Long Term Evolution (long-term evolution) has begun to commercial. With the increasing of mobile communication network users and the increasing of user data flow, the communication rate is increasing with the technological changes, which brings great challenges to the current wireless mobile communication network, such as the increase of power consumption and the increase of cost. Compared with the traditional base station platform, the power consumption and cost of the new base station platform using the software radio technology are greatly reduced, and it also has the advantages of high performance, extensibility and good stability. This makes the software radio technology based on the general purpose processor (GSP) become a research hotspot, and gradually becomes the most potential technology for the future base station of LTE. This paper focuses on the research and hardware implementation of the signal convergence board in the software radio platform. In this paper, the system architecture of software radio is analyzed in detail, and the performance of the chip which can accomplish this function is compared. Considering the factors of cost, reliability and implementation complexity, the Virtex-6XC6VLX130T model FPGA is used as the core board of the processor. Meet the system hardware platform, data rate requirements. Finally, the target of the signal convergent board is put forward in this paper. This paper further studies and designs the various functional circuits of the signal convergence board, including the design of PCI-Express Goldfinger, the design of clock circuit, the design of power module, the design of QDR and DDR3, the design of sub-board interface and the design of flash configuration circuit. Reset circuit design, high speed serial interface circuit. On this basis, the signal integrity of the key signal on the signal convergence board is analyzed in this paper, including GTX signal Rocket IO signal and high speed clock signal, which provides a guiding reference for the hardware PCB layout and wiring, and ensures the card stability. Finally, the software radio system is tested and verified. The main work includes the key module of the card and the connection between the signal convergence board and the sub-board to achieve the design goal.
【学位授予单位】：北京邮电大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN92;TN791

【共引文献】