高k栅介质SOI应变硅肖特基源漏MOSFET漏致势垒降低效应研究

发布时间：2018-04-22 22:04

本文选题：MOSFET + 漏致势垒降低　；参考：《四川大学学报(自然科学版)》2017年04期

【摘要】：高k栅介质SOI应变硅肖特基源漏MOSFET结合了应变硅工程、高k栅介质、SOI结构和肖特基源漏四者的优点,是一种实现小尺寸MOSFET的潜力器件.通过求解二维泊松方程建立了该结构的阈值电压模型,模型中考虑了镜像力势垒和小尺寸量子化效应对源漏极的电子本征肖特基势垒高度的影响,在阈值电压模型基础上获得了漏致势垒降低模型.从文献中提取漏致势垒降低的实验数据与模型进行对比,验证了其正确性,随后在此基础上讨论分析了漏致势垒降低和各项参数的变化关系.结果表明,漏致势垒降低随应变硅层厚度的变厚、沟道掺杂浓度的提高和锗组分的增大而增大,随沟道长度的变长、栅介质介电常数的增大、电子本征肖特基势垒高度的提高和漏源电压的增大而减小.适当调节模型参数,该结构可很好的抑制漏致势垒降低效应,对高k栅介质SOI应变硅肖特基源漏MOSFET器件以及电路设计具有一定的参考价值.
[Abstract]:High k gate dielectric SOI strained silicon Schottky source and drain MOSFET combines the advantages of strained silicon engineering, high k gate dielectric structure and Schottky source leakage, and is a potential device for realizing small size MOSFET. The threshold voltage model of the structure is established by solving the two-dimensional Poisson equation. The effects of mirror force barrier and small size quantization effect on the intrinsic Schottky barrier height of the source and drain are considered in the model. Based on the threshold voltage model, the leakage induced barrier reduction model is obtained. The experimental data of leakage induced barrier reduction were extracted from the literature and compared with the model to verify its correctness. Then, the relationship between the leakage induced barrier reduction and the variation of various parameters was discussed and analyzed. The results show that the decrease of leakage barrier increases with the thickness of strained silicon layer, the increase of channel doping concentration and the increase of germanium composition, and the dielectric constant of gate dielectric increases with the length of channel. The increase of intrinsic Schottky barrier height and leakage voltage decrease. By adjusting the model parameters properly, the structure can restrain the leakage induced barrier reduction effect well, and has certain reference value for the high k gate dielectric SOI strained silicon Schottky source-drain MOSFET device and circuit design.
【作者单位】：西安电子科技大学微电子学院宽禁带半导体材料与器件重点实验室;北京精密机电控制设备研究所;
【基金】：教育部博士点基金(JY0300122503) 中央高校基本业务课题(K5051225014,K5051225004)
【分类号】：TN386

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