一种高效的混合Test-Per-Clock测试方法

发布时间：2018-04-26 04:21

本文选题：IC测试 + 内建自测试　；参考：《电子与信息学报》2017年09期

【摘要】：该文提出了一种基于内建自测试(BIST)的Test-Per-Clock混合模式向量产生方法。测试由两个部分组成:自由线性反馈移位寄存器(LFSR)伪随机测试模式和受控LFSR确定型测试模式。伪随机测试模式用于快速地检测伪随机易测故障,减少确定型数据存储。受控LFSR测试模式采用直接存储在ROM中的控制位流对剩余故障产生确定型测试。通过对提出的BIST混合模式测试结构理论分析,提出了伪随机向量的选取方法以及基于受控线性移位确定型测试生成方法。基准电路的仿真结果表明,该方法可以获得完全单固定型故障覆盖率,其测试产生器设计简单且具有良好的稳定性,与其他方法相比,具有较低的测试开销和较短的测试应用时间。
[Abstract]:In this paper, a Test-Per-Clock hybrid pattern vector generation method based on built in self test (BIST) is proposed. The test consists of two parts: free linear feedback shift register (LFSRs) pseudorandom test mode and controlled LFSR deterministic test mode. Pseudorandom test mode is used to detect pseudorandom fault quickly and reduce deterministic data storage. The controlled LFSR test mode uses the control bit flow stored directly in the ROM to produce deterministic test for the remaining faults. Based on the theoretical analysis of the proposed BIST mixed mode test structure, a pseudorandom vector selection method and a test generation method based on controlled linear shift deterministic test are proposed. The simulation results of the reference circuit show that the proposed method can obtain complete single-fixed fault coverage, and the test generator has a simple design and good stability, compared with other methods. It has lower test cost and shorter test application time.
【作者单位】：杭州电子科技大学;
【基金】：浙江省自然科学基金(LQ15F040005)~~
【分类号】：TN407

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