基于不同排序方法的快速霍夫曼编码硬件实现
发布时间:2018-05-03 08:04
本文选题:霍夫曼编码 + 硬件排序 ; 参考:《计算机科学》2017年S2期
【摘要】:针对软件霍夫曼静态编码计算量大,而动态霍夫曼编码使得解码器同样复杂的缺点,提出了一种准动态霍夫曼硬件编码器。该编码器每次对一组数据序列进行静态编码,然后将编码并行输出,从而使得编码器具有较高的编码速度,而其延迟时间仅为一次编码过程的总时间。首先,为了充分利用硬件并行特性,分别使用动态排序和静态排序两种排序网络,以适应不同场合的编码需要。然后,使用数据流驱动的硬件二叉树构建和解析结构得到信源符号对应的霍夫曼编码。最后,将储存在FIFO中的输入数据查表并输出。设计结果表明,当使用Nexys4DDR平台时,该编码器可以工作于100MHz以上的频率,同时具有吞吐高、延迟低、编码效率高和译码器简单的特性。
[Abstract]:A quasi-dynamic Huffman hardware encoder is proposed to solve the problem that the software Hoffman static coding requires a large amount of computation while the dynamic Huffman coding makes the decoder equally complex. The encoder encodes a set of data sequences statically each time, and then outputs the encoding in parallel, so that the encoder has a higher coding speed, and its delay time is only the total time of the single coding process. Firstly, in order to make full use of hardware parallelism, two sort networks, dynamic sorting and static sorting, are used to meet the coding needs of different situations. Then, the Huffman code corresponding to the source symbol is obtained by constructing and parsing the hardware binary tree driven by the data stream. Finally, the input data stored in FIFO is checked and output. The design results show that the encoder can work at frequencies above 100MHz with high throughput, low delay, high coding efficiency and simple decoder when using Nexys4DDR platform.
【作者单位】: 浙江大学电气工程学院;
【分类号】:TN762
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