基于FPGA的Fibre-channel协议数字逻辑设计与实现

发布时间：2018-05-07 04:25

本文选题：光纤通道协议 + 光纤链路激活　；参考：《电子科技大学》2015年硕士论文

【摘要】：随着大数据时代的来临,海量数据的传输和存储对互联通信方式提出了传输速率更高,带宽更大,传输方式更便捷更安全等要求。基于高速互联传输的总线技术已经发展成为多种类,多速率方式。光纤通道技术凭借超高速的传输速率(最高可达到10Gbps的传输速率),良好的抗干扰性能,稳定的传输质量等特点成为高速互联领域研究的热点。论文通过对当前光纤通道技术发展的研究,以及对高速数据传输需求的分析,选择了光纤通道技术第三类服务作为本文的设计对象。在详细分析光纤通道协议体系结构的基础上,结合可编程逻辑器件(FPGA芯片)架构灵活、适合进行高速总线开发的特点,提出了在ALTERA Stratix IV芯片中进行Fibre-channel协议设计的方案。Fibre-channel协议的逻辑设计全部采用Verilog硬件描述语言完成,论文详细阐述了FC-0层,FC-1层,FC-2层的功能设计与实现过程,完成了最高8.5Gbps的数据传输指标,并支持点到点拓扑的第三类服务。本文的主要设计内容包括:(1)通过设计SFP+光模块和Stratix IV中的高速串行收发器实现FC-0层功能,将高速串行的光纤链路数据转变成40bit的低速并行的通路数据;(2)通过设计8B/10B编解码、传输字边界对齐、同步状态机和端口状态机,实现对原语数据的对齐操作,并将对齐的数据送入同步状态机完成同步检测,同步原语数据送入端口状态机进行链路状态的推进,直至实现光纤链路的激活,完成FC-1层规定的功能;(3)当链路实现激活之后,论文通过帧发送状态机设计,将数据按照标准的帧格式进行组装和发送,实现FC-2层中帧的发送和接收;(4)通过设计链路扩展服务数据帧的交互来实现双方端口的通信参数协商,在FC-2层实现架构登录,端口登录,进程登录和端口注销等设计;(5)基于缓冲区到缓冲区的流量控制策略设计,实现对帧接收和帧发送的控制,完成对整个通信状态的控制。论文最后对光纤通道系统的各个模块进行了相应的仿真和测试,测试包括了板级时域信号测试和各模块的逻辑测试。论文通过对高速收发器的初始化、端口状态机交互、帧合成与帧传输、架构登录、端口登录、进程登录等几个过程的测试结果进行分析,验证了光纤链路的激活、登录与注册状态、流量控制策略等设计达到了指标要求。
[Abstract]:With the advent of big data era, the transmission and storage of mass data put forward the requirements of higher transmission rate, larger bandwidth, more convenient and more secure transmission mode. Bus technology based on high-speed interconnection has developed into multi-type and multi-rate mode. Fiber channel technology has become a hotspot in the field of high-speed interconnection with the characteristics of super high speed transmission rate (up to 10Gbps transmission rate), good anti-interference performance and stable transmission quality. Through the research on the development of optical fiber channel technology and the analysis of the demand for high-speed data transmission, the third kind of service of optical fiber channel technology is chosen as the design object of this paper. Based on the detailed analysis of fiber channel protocol architecture and the flexible architecture of programmable logic device (FPGA), it is suitable for high-speed bus development. The logic design of Fibre-channel protocol in ALTERA Stratix IV chip is presented. The logic design of Fibre-channel protocol is accomplished by Verilog hardware description language. The function design and implementation process of FC-0 layer FC-1 layer and FC-2 layer are described in detail in this paper. The data transmission index of the highest 8.5Gbps is completed, and the third kind of service of point-to-point topology is supported. The main design contents of this paper include: (1) realizing the function of FC-0 layer by designing SFP optical module and high speed serial transceiver in Stratix IV, converting high speed serial fiber link data into 40bit low speed parallel path data 2) designing 8B/10B codec. The transmission word boundary alignment, synchronous state machine and port state machine realize the alignment operation of primitive data, and the aligned data is sent into the synchronous state machine to complete synchronous detection, and the synchronous primitive data is sent into port state machine to push forward the link state. When the link is activated, the data is assembled and transmitted according to the standard frame format through the design of frame sending state machine. To realize the transmission and reception of frames in FC-2 layer, the communication parameters of both ports can be negotiated by designing the interaction of link extension service data frames, and the architecture login and port login are realized in the FC-2 layer. The design of process login and port logoff is based on the design of buffer to buffer flow control strategy, which can control frame receiving and frame sending, and complete the control of the whole communication state. At the end of the paper, the corresponding simulation and test of each module of fiber channel system are carried out. The test includes board level time domain signal test and logic test of each module. By analyzing the initialization of high-speed transceiver, port state machine interaction, frame synthesis and frame transmission, architecture login, port login, process login and so on, the paper verifies the activation of optical fiber link. Login and registration status, flow control strategy and other design reached the target requirements.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN791;TN915.04

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