大电流SiC MOSFET器件关键技术与器件研究

发布时间：2018-05-11 05:39

本文选题：碳化硅 + MOSFETs　；参考：《电子科技大学》2017年硕士论文

【摘要】：碳化硅(SiC)优良的材料特性,使其十分适用于制作大功率高速的开关器件,例如金属-氧化物-半导体场效应晶体管(MOSFETs)。目前国内诸多研究小组已经展开了SiC MOSFETs的研制,然而国内研制的这批器件正向电流特性普遍较差。本文立足于国内碳化硅工艺实验平台,开展高压大电流SiC MOSFETs晶体管的结构设计和关键工艺技术研究。本文首先利用Silvaco仿真软件对SiC MOSFETs器件的元胞结构进行仿真设计,主要通过设计优化影响导通器件电阻的相关参数,在最优化正向电流特性的同时满足耐压要求且避免产生寄生效应;之后为满足制作工艺的需求对器件终端结构进行了重新设计优化。其次开展了大电流SiC MOSFETs晶体管关键工艺实验研究,主要包括:满足短沟道制作需求的SiC MOSFETs自对准工艺;为降低降低源接触电阻,开发出基于Ni金属的碳化硅P/N型欧姆合金工艺;为减少SiC/SiO_2界面态密度,摸索了将干法氧化和湿法氧化相结合的栅氧化工艺;为增强SiC MOSFETs栅ESD保护,设计并实验验证了工艺兼容的多晶硅二极管ESD结构。最后整合成熟的制作工艺,开展了大电流1200V 4H-SiC MOSFETs晶体管的流片实验。实验样品测试结果表明:采用非自对准工艺制作的器件正向电流26A@VGS=20V;采用自对准工艺制作的器件正向电流34A@VGS=20V。同时,利用研制的横向SiC MOSFETs晶体管提取了器件的反型层沟道迁移率,迁移率约为20 cm2/V·s。本文基于国内的SiC器件工艺试验平台,通过对高压大电流SiC MOSFETs晶体管的结构设计和关键工艺技术研究,实现了1200V/30A SiC MOSFETs晶体管样品的研制,为国内高压大电流4H-SiC MOSFETs器件的研制提供了参考。
[Abstract]:Because of its excellent material properties, sic is very suitable for high power and high speed switching devices, such as metal-oxide-semiconductor field effect transistors (MOSFETs). At present, many domestic research groups have developed SiC MOSFETs. However, the forward current characteristics of these devices are generally poor. Based on the experimental platform of silicon carbide process in China, the structure design and key technology of high-voltage and high-current SiC MOSFETs transistors are studied in this paper. In this paper, the cellular structure of SiC MOSFETs devices is designed by using Silvaco simulation software, and the parameters that affect the resistance of the devices are optimized. In order to optimize the forward current characteristics and avoid parasitic effect, the device terminal structure is redesigned and optimized to meet the requirements of fabrication process. Secondly, the key process experiments of high current SiC MOSFETs transistors are carried out, including: the SiC MOSFETs self-alignment process to meet the needs of short channel fabrication, the development of silicon carbide P / N ohmic alloy process based on Ni metal in order to reduce the source contact resistance. In order to reduce the density of interfacial states of SiC/SiO_2, the gate oxidation process combining dry and wet oxidation was explored, and the ESD structure of polycrystalline silicon diode was designed and experimentally verified to enhance the protection of SiC MOSFETs gate ESD. Finally, the wafer experiment of 1200V 4H-SiC MOSFETs transistor with high current is carried out by integrating the mature fabrication technology. The experimental results show that the forward current of the device made by the off-alignment process is 26AVGSN 20V, and that of the device fabricated by the self-aligned process is 34AVGS- 20V. At the same time, the transversal layer channel mobility of the device is extracted by using the developed transverse SiC MOSFETs transistor, and the mobility is about 20 cm2/V s. Based on the SiC device process test platform in China, the structure design and key technology of SiC MOSFETs transistor with high voltage and high current are studied in this paper, and the sample of 1200V/30A SiC MOSFETs transistor is developed. It provides a reference for the development of high voltage and high current 4H-SiC MOSFETs devices in China.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN386

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