三维堆叠封装硅通孔热机械可靠性分析

发布时间：2018-05-14 10:43

本文选题：硅通孔(TSV) + 热机械可靠性　；参考：《华中科技大学》2015年硕士论文

【摘要】：近年来,微电子行业快速发展,对于电子产品的封装要求也越来越高,就促使封装行业的关键技术获得进一步改进,其中硅通孔技术的出现将封装业带入了一个新的转折点,但是随着尺寸的微细化,硅通孔技术作为一项新的技术,也存在很多问题,考虑到封装的疲劳和失效,其中对于三维堆叠封装结构的热可靠性分析成为了该项技术发展的关键。为了避免封装结构关键部位在热载荷的作用下发生热变形失效,本文进行了以下几个方面的研究。首先,研究了电镀铜使用不同的材料属性参数,单个硅通孔在热冲击温度载荷下的热机械响应。经过多次有限元分析,得出两者应力大小和分布的不同,总结应力大小分布发生的机理,进一步研究了结构参数对于单个硅通孔热机械可靠性的影响。对比了相同结构参数下单个硅通孔在二维模型和三维模型下的分析结果。经过多次建模分析,得出了在两种模型下,硅通孔的应力大小和分布的相同点和不同点。其次,用解析法和数值方法联合研究二维俯视图和轴向图简化结构的适用范围,通过探究得出,芯片堆叠封装用二维轴向模型可以相对准确的反映堆叠芯片之间热应力的相互影响。最后,建立了多层堆叠芯片的二维轴向简化模型,研究了其整体变形以及关键部位的应力分布和大小,并研究了结构参数,包括芯片中硅通孔直径、微焊点高度、中介层中硅通孔直径、中介层厚度和常规焊点高度对其热应力的影响曲线图。通过本文研究,为硅通孔的设计提供科学的理论依据,对电子封装行业的发展具有深远的社会意义。
[Abstract]:In recent years, with the rapid development of the microelectronics industry, the packaging requirements for electronic products are becoming higher and higher. The key technologies of the packaging industry have been further improved. The emergence of silicon through hole technology has brought the packaging industry into a new turning point. However, as a new technology, silicon through hole technology has many problems. Considering the fatigue and failure of packaging, the thermal reliability analysis of three-dimensional stacked packaging structure becomes the key to the development of this technology. In order to avoid the thermal deformation failure of the key parts of the packaging structure under thermal load, the following aspects are studied in this paper. Firstly, the thermal mechanical response of single silicon through hole under thermal shock temperature load with different properties of copper electroplating was studied. After many finite element analysis, the difference of stress size and distribution between them is obtained. The mechanism of stress distribution is summarized, and the influence of structural parameters on the thermal mechanical reliability of a single silicon through hole is further studied. The results of two dimensional model and three dimensional model are compared. After several modeling and analysis, the similarities and differences of the stress size and distribution of the through hole in the two models are obtained. Secondly, using the analytical method and numerical method to study the application range of the simplified structure of the two-dimensional overlooking map and the axial chart, it is concluded that, Two-dimensional axial model for chip stacking packaging can reflect the interaction of thermal stress between stacked chips relatively accurately. Finally, the two-dimensional axial simplified model of multilayer stacked chip is established, and the global deformation, stress distribution and size of key parts are studied, and the structural parameters, including the diameter of silicon through hole and the height of micro-solder joint in the chip, are studied. The influence of the diameter of the through hole, the thickness of the interlayer and the height of the conventional solder joint on the thermal stress in the interlayer. Through the research in this paper, it provides a scientific theoretical basis for the design of silicon through hole, and has far-reaching social significance for the development of electronic packaging industry.
【学位授予单位】：华中科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN05

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