硅基CMOS毫米波移相器的研究与设计

发布时间：2018-05-19 04:25

  本文选题：毫米波 + CMOS　； 参考：《电子科技大学》2015年硕士论文

【摘要】：社会的发展和进步使得人们对具有高数据传输速率、大接入容量的无线通信系统的需求越来越强烈,现有的无线通信标准受限于有限的频谱和信道资源,很难满足这些的要求。基于相控阵结构的毫米波通信系统是解决这些问题的潜在技术方案,而硅基CMOS技术的发展进步使得低功耗、低成本和高集成度的相控阵系统单片集成成为可能。作为其中的关键电路模块,移相器的设计至关重要,本文主要目的就是研究利用CMOS工艺设计出高精度、低功耗的毫米波移相器。本设计采用基于矢量合成技术的有源结构以提高电路的信号增益、克服硅基工艺的高插损特性对移相器性能的限制。整个电路结构分为三个主要部分,包括可变增益控制单元、正交信号发生器以及信号合成器。为了减小电路的面积和功耗,电路没有使用全差分的结构形式而是在传统结构的基础上进行了改进。可变增益单元被提到电路的第一级,它在控制信号的作用下对输入信号进行离散的增益控制,并将两路不同大小的同相信号分配到下一级;正交信号发生器由电容电感组成的高低通网络来实现,它具有频带宽、低损耗的特点;信号合成器由两个Gilbert单元电路组成,它分为两级结构,其中的共源放大器对信号进一步放大以补偿无源正交网络的损耗,另一部分则在控制信号作用下对合成信号的极性进行选择。除此之外,电路中使用了基于电流复用的技术片上巴伦将两路正交信号转化为四路差动信号,这样既可以减小电路面积又降低了直流功耗。该60GHz有源移相器采用TSMC 90 nm RF CMOS工艺进行设计,经流片测试:移相器可以实现360o范围内4bit相位精度,在57~64GHz频率范围内,16个相位状态下均方根增益误差为0.75~1.6 dB,均方根相位误差为2.3o~7.6o。电路的噪声系数为9~12dB,移相器的峰值功率增益约为2.5dB(@60.5GHz),整个芯片的面积约为0.61mm2,在1.8V的供电电压下电路功耗为19.8mW。
[Abstract]:With the development and progress of society, the demand for wireless communication systems with high data transmission rate and large access capacity is becoming more and more intense. The existing wireless communication standards are limited by limited spectrum and channel resources, so it is difficult to meet these requirements. Millimeter-wave communication system based on phased array structure is a potential solution to these problems, and the development of silicon-based CMOS technology makes it possible to integrate single-chip phased array systems with low power consumption, low cost and high integration. As a key circuit module, the design of phase shifter is very important. The main purpose of this paper is to design a high-precision, low-power millimeter wave phase shifter using CMOS technology. The active structure based on vector synthesis technology is used to improve the signal gain of the circuit and overcome the limitation of the high insertion loss characteristics of the silicon based process on the performance of the phase shifter. The whole circuit is divided into three main parts, including variable gain control unit, orthogonal signal generator and signal synthesizer. In order to reduce the area and power consumption of the circuit, the circuit is improved on the basis of the traditional structure instead of the fully differential structure. The variable gain unit is referred to the first stage of the circuit. It performs discrete gain control on the input signal under the action of the control signal, and allocates two different sizes of the same belief signal to the next stage. The quadrature signal generator is realized by high and low pass network composed of capacitive inductance. It has the characteristics of frequency bandwidth and low loss. The signal synthesizer is composed of two Gilbert unit circuits, and it is divided into two stages. The common source amplifier further amplifies the signal to compensate for the loss of the passive orthogonal network. The other part selects the polarity of the composite signal under the action of the control signal. In addition, based on current multiplexing technology, Barron converts two orthogonal signals into four-channel differential signals, which can reduce the circuit area and DC power consumption. The 60GHz active phase shifter is designed by TSMC 90 nm RF CMOS process. The phase shifter can achieve the 4bit phase accuracy in the range of 360 o by using the TSMC 90 nm RF CMOS process. In the 57~64GHz frequency range, the RMS gain error in the 16 phase states is 0.751.6dB, and the RMS phase error is 2.3o0 / 7.6o. The noise coefficient of the circuit is 9 ~ 12 dB, the peak power gain of the phase shifter is about 2.5 dB / s and the area of the whole chip is about 0.61mm ~ 2, and the power consumption of the circuit is 19.8mW at 1.8V power supply voltage.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN623
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本文编号：1908709