集成TVS器件的RS485接口芯片的分析和设计
发布时间:2018-05-19 12:46
本文选题:Transient + Voltage ; 参考:《湘潭大学》2015年硕士论文
【摘要】:智能电网是目前全世界节能减排的重要举措之一,其中具有可长距离通讯的RS485网络是智能电网中最为关键的通信网络。RS485的传输总线一般架在室外或沿电缆铺设,常因雷击引发传输线上产生瞬变干扰而导致芯片的损坏。此外,RS485网路常采用直线拓扑结构,一条总线上挂载着数十至上百个RS485收发器,因而雷击、浪涌产生的大电压突变就有可能导致RS485网络中收发芯片的同时损坏,从而导致网络系统的瘫痪。所以,对电压突变的防护是RS485芯片设计时必须考虑的问题,也是提高系统可靠性及安全性的关键所在。对于传统的RS485收发器,为了达到DL/T645的标准,传输总线端口A、B会有人体模型(HBM,Human Body Model)15kV的规格要求,但在实际应用中,这样的防护等级是不够的。目前一般的解决方法是在RS485收发器总线端口处外接瞬变电压抑制二极管(Transient Voltage Suppressor,TVS)来防止电压突波。但一般的独立TVS器件成本高而且使用不方便。同样,压敏电阻因其寄生电容大,导通电阻也高,且低电压的压敏电阻漏电流大,也不适合用于RS485介面保护。而利用传统半导体工艺制作的TVS虽然反应速度极快,但其耐高电压、高电流的能力不足,所以也难以抵挡雷击浪涌的冲击,而采用新型CMOS IC工艺,可以克服许多技术上的瓶颈。本文的主要工作是:一、通过采用CMOS工艺将TVS器件和RS485电路实现单片集成,以解决压敏电阻寄生电容大,导通电阻高,且低电压压敏电阻漏电流大不适合用于RS485介面保护的弊端,同时克服传统半导体制作的TVS耐高电压、高电流的能力不足,难以抵挡雷击浪涌的冲击的问题。二、基于TIA/EIA的RS485通讯协议标准,采用台湾旺宏电子股份有限公司0.5μm高压CMOS工艺,使用Cadence Virtuoso EDA软件设计完成一款集成有TVS器件的RS485接口芯片。芯片采用半双工、双向通讯方式,具有抗雷击、浪涌、低功耗、短路保护等特点;芯片输入阻抗为1/8单位负载,能够并行驱动256个同类型的收发器。本文设计完成的芯片主要由接收器、驱动器以及TVS器件构成,芯片采用平衡驱动和差分接收的工作方式。芯片通过三次流片以及多次优化和改进,实现了预先设计的指标,并顺利通过了芯片厂商的性能以及可靠性等工程性测试;与国内同类产品相比,具有面积更小,抗干扰能力更强的特点。
[Abstract]:Smart grid is one of the most important measures of energy saving and emission reduction in the world at present. The RS485 network with long distance communication is the most important communication network in smart grid. RS485 transmission bus is generally built outdoors or along the cable. The chip is often damaged by transient interference on the transmission line caused by lightning strike. In addition, the RS485 network often adopts a linear topology, and dozens to hundreds of RS485 transceivers are mounted on a bus. As a result, the sudden change of large voltage caused by the surge may result in the simultaneous damage of the transceiver and transceiver chips in the RS485 network. This leads to the paralysis of the network system. Therefore, the protection of voltage mutation is an important problem in the design of RS485 chip, and also the key to improve the reliability and security of the system. For the traditional RS485 transceiver, in order to meet the standard of DL/T645, the transmission bus port AZB will have the specification requirements of the human body model RS485 / RS485 Body Model)15kV, but in practical application, this protection level is not enough. At present, the common solution is to install transient Voltage suppressor TVs at the bus port of RS485 transceiver to prevent voltage burst. But the general independent TVS device is expensive and inconvenient to use. Similarly, the varistor is not suitable for RS485 interface protection because of its large parasitic capacitance, high on-resistance and high leakage current of low-voltage varistor. Although the reaction speed of TVS made by traditional semiconductor process is very fast, its ability to withstand high voltage and high current is not enough, so it is difficult to resist the impact of lightning surge, and the new CMOS IC process can overcome many technical bottlenecks. The main work of this paper is as follows: first, the monolithic integration of TVS device and RS485 circuit is realized by using CMOS process to solve the problem of high parasitic capacitance and high on-resistance of varistor. The leakage current of low voltage varistor is not suitable for RS485 interface protection, and the problem of high voltage resistance and high current ability of TVS made by traditional semiconductor is overcome, and it is difficult to resist the impact of lightning surge. Secondly, based on the RS485 communication protocol standard of TIA/EIA, using the 0.5 渭 m high voltage CMOS process of Taiwan Wang Hong Electronics Co., Ltd., a RS485 interface chip integrated with TVS device is designed by using Cadence Virtuoso EDA software. The chip uses semi-duplex, two-way communication mode, has the characteristics of anti-lightning, surge, low power consumption, short circuit protection, etc. The input impedance of the chip is 1 / 8 unit load, and can drive 256 similar transceivers in parallel. The chip designed in this paper is composed of receiver, driver and TVS device. The chip uses balanced drive and differential reception. The chip has been optimized and improved for many times through three flow sheets, and has successfully passed the engineering tests of chip manufacturer's performance and reliability, and has a smaller area than other similar products in China. The ability of anti-interference is stronger.
【学位授予单位】:湘潭大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN402;TM76
【参考文献】
相关硕士学位论文 前1条
1 刘锦江;CMOS电流差分缓冲放大器及电流模式滤波器的研究与设计[D];湖南大学;2012年
,本文编号:1910148
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