高性能升压型电源管理芯片的研究与优化设计

发布时间：2018-05-19 18:15

本文选题：升压型DC-DC转换器 + 环路控制方法　；参考：《西安电子科技大学》2015年博士论文

【摘要】：随着微电子技术以及半导体工艺的迅猛发展,电源管理类芯片已广泛应用于计算机、通信网络、汽车电子及便携式电子设备等诸多产品领域。近年来,用户端对电源管理类芯片性能的要求在不断地提高,高效率、高可靠性、高集成度和低成本已经成为DC-DC变换器的重点研究方向。本文紧跟市场发展动向,以升压型DC-DC转换器为研究对象,着力研究了其控制理论及关键电路结构,针对传统DC-DC电源管理芯片在效率和可靠性方面的问题,提出了相应优化方案和具体实现电路,研究成果如下。1.针对传统大功率升压型DC-DC控制器采样电路中存在的缺陷,提出了一种新颖的高准确度、快速响应采样电路。该电路通过片外电感的等效直流电阻来得到完整的电感电流信息,引入了一个快速响应电路模块来补偿晶体管之间的工艺偏差,从而提高了采样准确度,同时提供一条额外的电流反馈回路来减小电路的响应时间。当电路达到平衡状态时,额外引入的电流环路上就不会再有电流通过,因此在不增加系统整体静态功耗的基础上就可以达到设计目的。且该电路具有较大的共模工作电压范围,因此适合宽输入范围、大功率和高效率的应用环境。2.针对传统大功率升压型DC-DC控制器在轻负载时效率低的问题,提出了一种三模式环路控制方法的解决方案及其具体实现电路。由系统功率损耗组成的分析得知,轻负载下控制方式的不合理是造成其效率低的主要原因。此方法在传统控制方式基础上进行优化,通过三个不同的工作模式:PWM模式、Burst模式和Sleep模式之间的互相转换,提高了轻负载时的效率。此种环路控制方案精确度高,适用于宽负载的应用环境。3.通过对大功率升压型DC-DC控制器等效环路模型的分析,提出了一种改进的PCB版图方案。对整体的布局布线进行了修改,减小了寄生电感和寄生电容所引入的高频噪声,在提高系统稳定性的同时也提高了效率。4.针对高精度控制、高效率、低输入电压的应用方案,提出了一种具有超低启动电压、小输出电压纹波、高效率的高性能小功率升压型DC-DC迟滞电流模转换器。该转换器引入了一种新颖的超低电压启动模块来降低最小工作电压。当输入电压低于系统正常工作所需要的最低电压时,此模块可以控制功率管的开关动作,并将系统内部的供电电源抬高至足够高的电压,从而可以使系统正常地工作,这也就增加了电池的使用时间。同时引入了一个新颖的双管迟滞采样电路来产生固定的电流控制迟滞窗口,此电流窗口决定了输出电压纹波的大小且不会随着负载的变化而变。因此无论系统处于何种负载情况下都可以保证有小的输出电压纹波,且同时可以保证系统的稳定性。此外还提出了一种自动模式切换技术,它可以通过检测系统的负载大小去选择适合的工作模式。当负载电流较小的时候,芯片会进入功率节省模式,此时大部分子电路以及功率管都被断开,从而提高了系统的效率。5.针对模式自动切换电流模电荷泵控制器在启动阶段过冲电流过大的问题,提出了一种新颖的两阶段启动技术。从传统启动阶段的控制模式流程入手,提出了一种新颖的启动阶段控制模式流程。引入了两个额外启动阶段来分别限制启动初期的过冲电流和模式切换阶段的过冲电流。该电路所占用面积很小且容易实现,因此适合在芯片内进行集成。6.模式自动切换电荷泵的MOSFET开关在断开的时候会引起电荷注入效应,这就导致在其输出电容上会产生一定的误差电压。此误差电压会导致在输出电压纹波上产生一个高频尖峰电压,它不但会增加输出电压纹波的值,还会降低系统的效率。为了减小此现象带来的影响,本文提出了此种电荷泵开关拓扑结构的一种等效模型,并且通过此模型推导出了一系列关于开关误差电压和尖峰电压的方程式。因此可以通过调整与开关误差电压和尖峰电压有关的一些参数,来减小它们所带来的不利影响。
[Abstract]:With the rapid development of microelectronic technology and semiconductor technology, power management chips have been widely used in many fields such as computer, communication network, automotive electronics and portable electronic equipment. In recent years, the requirements of the user side to power management chip performance are constantly improving, high efficiency, high reliability, high integration and low efficiency. This paper has become the key research direction of the DC-DC converter. This paper follows the trend of the market development, takes the boost type DC-DC converter as the research object, and focuses on its control theory and key circuit structure. In view of the problems of the efficiency and reliability of the traditional DC-DC power management chip, the corresponding optimization scheme and the concrete realization circuit are put forward. The research results are as follows:.1. has proposed a novel high accuracy, fast response sampling circuit for the defects in the traditional high power DC-DC controller sampling circuit. This circuit obtains the complete inductance current information through the equivalent DC resistance of the outer inductor, and introduces a fast response circuit module to compensate the crystal. The process deviation between the tubes improves the sampling accuracy and provides an additional current feedback loop to reduce the response time of the circuit. When the circuit reaches the equilibrium state, the additional current loop will not pass through the current, so the design goal can be achieved without increasing the overall static power consumption of the system. And the circuit has a large common mode voltage range, so it is suitable for wide input range, high power and high efficiency application environment.2., aiming at the low efficiency of the traditional high power DC-DC controller with light load, a solution scheme and its concrete realization circuit of the three mode loop control method are proposed. The analysis of loss composition shows that the unreasonable control mode under the light load is the main reason for its low efficiency. This method is optimized on the basis of traditional control mode, and through three different working modes: PWM mode, Burst mode and Sleep mode, the efficiency of light load is improved. This loop control scheme is improved. High precision, suitable for wide load application environment.3. through the analysis of the equivalent loop model of high power DC-DC controller, an improved PCB layout scheme is proposed. The overall layout and wiring is modified to reduce the high frequency noise introduced by the parasitic inductance and parasitic capacitance, and also to improve the stability of the system as well. High efficiency.4., aiming at the application of high precision control, high efficiency and low input voltage, presents a type of DC-DC hysteresis current mode converter with ultra-low start voltage, small output voltage ripple and high efficiency and high performance and low power. This converter introduces a novel ultra low voltage startup module to reduce the minimum operating voltage. When the input voltage is lower than the minimum voltage required for the normal operation of the system, this module can control the switching action of the power pipe and raise the power supply inside the system to a high enough voltage to make the system work normally. This also increases the use time of the battery. A novel double tube hysteresis sampling is introduced. The circuit generates a fixed current control hysteresis window that determines the size of the output voltage ripple and does not change with the change of the load. Therefore, a small output voltage ripple can be guaranteed no matter what load the system is in, and the stability of the system can be ensured at the same time. In addition, an automatic mode is proposed. It can select the suitable working mode by detecting the load size of the system. When the load current is small, the chip will enter the power saving mode. At this time, most of the sub circuits and the power pipes are disconnected, thus the efficiency of the system is improved.5. for the mode automatic switching current mode charge pump controller in start. A novel two stage starting technology is proposed in the stage of excessive overshoot current. Starting from the traditional start stage control mode flow, a novel start stage control mode flow is proposed. Two additional start-up stages are introduced to limit overshoot current and overshoot current in the mode switching stage respectively. The area occupied by the circuit is very small and easy to be realized, so the MOSFET switch suitable for the integrated.6. mode switching charge pump in the chip will cause the charge injection effect when disconnected, which causes a certain error voltage on its output capacitance. This error voltage will result in a high output voltage ripple. The frequency peak voltage not only increases the value of the output voltage ripple, but also reduces the efficiency of the system. In order to reduce the effect of this phenomenon, this paper presents an equivalent model of the switch topology of this kind of charge pump, and derives a series of equations about the voltage and peak voltage of the opening error and the peak voltage by this model. By adjusting some parameters related to switching error voltage and peak voltage, the adverse effects can be reduced.
【学位授予单位】：西安电子科技大学
【学位级别】：博士
【学位授予年份】：2015
【分类号】：TN402

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