基于自适应技术的亚阈区数字电路研究与设计

发布时间：2018-05-27 14:01

本文选题：超低电压 + 亚阈值　；参考：《电子科技大学》2015年硕士论文

【摘要】：近年来,得益于物联网、可穿戴以及手机和平板市场的蓬勃发展,集成电路领域对无线网络芯片的研究越来越多。但是,由于芯片的功率密度随CMOS工艺线宽的降低而迅速上升,耗能过高的问题逐渐成为制约移动终端市场发展重要因素。亚阈值数字电路属于超低压数字电路的技术范畴,通过将数字电路的供电电压降低至亚阈值区,使芯片完成单次操作的能耗达到最小。亚阈值数字电路在移动网络芯片、医疗植入芯片、环境监测芯片的集成电路的热门领域有着广阔的应用前景,如今已经成为低功耗领域的一个重要研究方向。本文从研究意义、理论基础、设计难点以及设计方法等方面对亚阈值数字电路的设计做了深入探讨。首先,本文从芯片工艺和半导体市场的最新动态入手,分析了亚阈值数字电路的研究价值,并对亚阈值技术的发展背景和最新动态做了介绍。其次,本文分析了亚阈值数字电路设计的理论基础。包括数字电路能耗的组成和最小能量点理论的推导,并以此为依据,阐述了电路设计难点以及PVT(Process,Voltage,Temperature)补偿技术在亚阈值数字电路设计中的重要性。之后,本文研究了亚阈数字电路的设计方法,该方法采用标准单元库(Standard Cell Library,SCL)重新特征化(Recharacterization)技术,完成亚阈值数字单元库的设计,结合单元库和标准电路数字电路设计流程提出了一种适合亚阈值数字电路的设计流程。然后,本文设计了一款适合在亚阈值电压下工作的数字FIR滤波器,介绍了滤波器中各个模块的工作原理并按照亚阈值数字电路设计流程,对FIR滤波器进行了逻辑综合和仿真,验证了设计流程的可行性。最后,介于亚阈值电路中PVT补偿的重要作用,本文设计了一种自适应电压调节(Adaptive Voltage Scaling,AVS)系统,对亚阈值数字电路的PVT偏差进行补偿,确保亚阈值电路在不同的PVT条件下都可以实现正常功能。本文采用180 nm标准CMOS工艺完成了FIR滤波器与AVS系统的设计,进行仿真验证。
[Abstract]:In recent years, thanks to the rapid development of the Internet of things, wearable and mobile phone and flat panel markets, more and more researches have been made on wireless network chips in the field of integrated circuits. However, the power density of the chip increases rapidly with the decrease of the line width of the CMOS process, and the problem of excessive energy consumption has gradually become an important factor restricting the development of the mobile terminal market. Subthreshold digital circuit belongs to the technical category of ultra-low voltage digital circuit. By reducing the supply voltage of digital circuit to sub-threshold region, the energy consumption of single operation can be minimized. Subthreshold digital circuits have a wide application prospect in the field of mobile network chips, medical implants chips and environmental monitoring chips, and have become an important research direction in the field of low power consumption. In this paper, the design of subthreshold digital circuits is discussed from the aspects of research significance, theoretical basis, design difficulties and design methods. Firstly, starting with the latest development of chip technology and semiconductor market, this paper analyzes the research value of subthreshold digital circuit, and introduces the development background and latest development of sub-threshold technology. Secondly, this paper analyzes the theoretical basis of sub-threshold digital circuit design. The composition of the energy consumption of digital circuits and the derivation of the minimum energy point theory are included. Based on this, the difficulties of circuit design and the importance of PVT process VoltageTemperature-compensation technology in the design of subthreshold digital circuits are expounded. Then, the design method of subthreshold digital circuit is studied in this paper. The design of sub-threshold digital cell library is accomplished by using standard Cell library (SCL) recharacterizing technique. Combined with cell library and standard circuit digital circuit design flow, a design process suitable for subthreshold digital circuit is proposed. Then, this paper designs a digital FIR filter suitable for working under sub-threshold voltage, and introduces the working principle of each module in the filter. According to the design flow of sub-threshold digital circuit, the logic synthesis and simulation of FIR filter are carried out. The feasibility of the design process is verified. Finally, in view of the important role of PVT compensation in sub-threshold circuits, an adaptive Voltage scaling system is designed to compensate the PVT bias of sub-threshold digital circuits. Make sure that the subthreshold circuit can achieve normal function under different PVT conditions. In this paper, the design of FIR filter and AVS system is completed by using 180nm standard CMOS process, and the simulation is carried out.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN79

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