一款射频SOC芯片的数字控制电路的设计

发布时间：2018-06-01 11:58

本文选题：SOC + 数字　；参考：《湘潭大学》2017年硕士论文

【摘要】：随着科学技术的发展,人们对居住环境有着越来越高的要求。这就导致了智能家居概念的产生。在智能家居中,为了解决布线不便的困难,慢慢地衍生出用中短程距离无线通信来代替原始的有线通信的解决办法。引入无线通信技术,可以解决有线网络带来的布线困难、不易于维护的缺点,在智能家居、工业控制等领域成为研究热点。目前的无线通信技术主要有ZigBee、WIFI、射频无线技术、蓝牙等,而射频无线技术就是通过射频收发一体芯片实现的。对于它的应用用户不需要了解通信原理和工作机制,只需要对芯片内的寄存器加以配置就可以实现数据的收发,使用非常简单。与此同时,这类芯片具有开发成本低、传输距离较远、越障能力强的优点,因而射频无线通信成为研究的热点。当前射频电路与SOC集成电路的结合,为射频无线通信赋予了更多的应用场景,也更加推动了社会智能化的发展。但是这也造成了射频通信工作模式的多样性与复杂度。因此,射频电路功能配置与切换的完成变得尤为重要。基于现阶段射频通信的研究热度和集成电路的飞速发展,本文对SOC芯片RF915中的控制电路采用数字集成电路的方法进行设计与实现。在RF915中主要由射频前端和数字控制电路组成。数字控制电路采用SPI接口进行数据传输,这些数据通过译码一部分用来对射频前端中的寄存器进行配置,从而使得射频前端的工作模式和频率范围可通过编程进行配置和改变,增加了射频前端的灵活性。另一部分作为DAC中的数据,但由于DAC采样的速率和SPI的速度不一致,因而在中间采用了一个SRAM的存储器存储SPI发送来的数据,并采用FIFO环的结构向SRAM中存取数据,使得数据能准确有效地被采样。同时,这个SRAM存储器是使用memory compiler公司的IP核,这样就缩短了开发周期,减小了设计成本。在本文中,首先介绍SOC芯片RF915芯片的整体架构,然后在电路总线结构,电路通信接口,IP核复用技术等相关理论依据的支撑下,选择出合适的数字控制电路的设计方案;然后通过Verilog HDL语言对该数字控制电路进行逻辑设计,再通过NC-Verilog仿真工具对设计进行功能仿真,并给出仿真波形说明。然后,在SOC ENCOUNTER工具下基于GSMC 180nm的标准单元设计模式下对该设计进行物理实现;最后,对上述工作进行总结和展望。
[Abstract]:With the development of science and technology, people have higher and higher requirements for living environment. This led to the emergence of the concept of smart home. In smart home, in order to solve the problem of inconvenient wiring, the solution of replacing the original wired communication with short-range wireless communication is derived. The introduction of wireless communication technology can solve the difficulties of wiring caused by wired network, which is difficult to maintain. It has become a research hotspot in the fields of smart home, industrial control and so on. At present, the wireless communication technology mainly includes ZigBeeWIFI, RF wireless technology, Bluetooth and so on, and RF wireless technology is realized by RF transceiver integrated chip. For its application users do not need to understand the communication principle and working mechanism, only need to configure the register in the chip to realize the data sending and receiving, the use is very simple. At the same time, this kind of chip has the advantages of low development cost, long transmission distance and strong ability of surmounting obstacles, so RF wireless communication has become a hot research topic. At present, the combination of RF circuits and SOC integrated circuits gives more application scenarios for RF wireless communication, and promotes the development of social intelligence. However, this also leads to the diversity and complexity of RF communication modes. Therefore, the completion of RF circuit function configuration and switching becomes particularly important. Based on the research of RF communication and the rapid development of integrated circuit, this paper designs and implements the control circuit of SOC chip RF915 by digital integrated circuit. In RF915, it is mainly composed of RF front end and digital control circuit. The digital control circuit uses SPI interface for data transmission, which is used to configure the registers in the RF front-end by decoding part of the data, so that the working mode and frequency range of the RF front-end can be configured and changed by programming. The flexibility of RF front end is increased. The other part is the data in DAC, but because the sampling rate of DAC is not consistent with the speed of SPI, a memory of SRAM is used in the middle to store the data sent by SPI, and the structure of FIFO loop is used to access the data in SRAM. The data can be sampled accurately and effectively. At the same time, the SRAM memory uses memory compiler's IP core, which shortens the development cycle and reduces the design cost. In this paper, the whole architecture of SOC chip RF915 chip is introduced firstly, then the design scheme of digital control circuit is selected under the support of circuit bus structure, circuit communication interface IP core multiplexing technology and so on. Then the logic design of the digital control circuit is carried out by Verilog HDL language, and the function of the design is simulated by the NC-Verilog simulation tool, and the simulation waveform is given. Then, the physical implementation of the design is carried out in the standard cell design mode based on GSMC 180nm under the SOC ENCOUNTER tool. Finally, the above work is summarized and prospected.
【学位授予单位】：湘潭大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN47

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