碳基场效应管的隧穿电流及其对逻辑电路的影响

发布时间：2018-06-14 23:33

本文选题：碳纳米管 + 石墨烯　；参考：《南京邮电大学》2015年硕士论文

【摘要】：首先,采用一种量子力学模型研究纳米碳基场效应管电流特性,该模型基于二维NEGF(非平衡格林函数)方程和Poisson方程自洽全量子数值解。结合器件的工作原理,研究基于栅工程和沟道工程技术的碳基场效应管输运特性。其次,在器件电学特性研究的基础上,将研究范围扩展至电路,分析采用栅工程和沟道工程碳基场效应晶体管构建的电路性能。最后,研究场效应晶体管栅极隧穿电流对与门电路逻辑操作的影响。主要研究内容如下:(1)研究基于沟道工程和栅工程技术构建纳米碳基场效应管的输运特性。基于多体量子NEGF方法,研究了异质栅和沟道轻掺杂纳米碳基器件的沟道电流特性,研究结果表明,碳基器件具有与一般场效应管类似的共性:如栅长减小,DIBL效应增大;栅氧厚度的减小能提高器件亚阈特性。与普通单栅相比,异质栅结合沟道轻掺杂器件不仅具有更优的栅控能力,能更好地抑制短沟道效应,具有更低的泄漏电流、更高的电流开关比。另外,在量子输运模型基础上,讨论碳基器件载流子输运特性,探索接近最终缩小极限的器件设计理论问题,并以国际半导体技术发展指南(ITRS’10)提出的2016-2024年晶体管指标为目标参量,进行新器件结构的工程设计优化。(2)在器件电学特性的基础上,基于Verilog-A查找表模型,利用HSPICE分析几种新型结构器件所构建电路,包括基于异质栅结合沟道轻掺杂CNTFET反相器(LHCINV)和6管的静态随机存储器(LHCSRAMs)的电学特性。结果表明,LHCINV具有较低的上升和下降延迟,较低的功耗和功耗延迟积(PDP)。LHCSRAMs具有较低的写数据延迟,较低的功耗和PDP。(3)利用薛定谔方程求解场效应管的栅极隧穿电流,利用查找表模型的HSPICE分析发现,器件氧化层栅极隧穿电流会对电路的逻辑功能产生影响,导致电路逻辑操作失误。
[Abstract]:First of all, a quantum mechanical model is used to study the current characteristics of nanocrystalline carbon based FET. The model is based on two-dimensional NEGF (nonequilibrium Green function) equation and Poisson equation self-consistent full quantum numerical solution. The transport characteristics of carbon based FET based on gate engineering and channel engineering are studied based on the principle of the device. Secondly, on the basis of the study of the electrical properties of the devices, the research scope is extended to the circuit, and the circuit performance is analyzed by using the gate engineering and channel engineering carbon-based field-effect transistors. Finally, the effect of gate tunneling current on gate logic operation is studied. The main research contents are as follows: (1) the transport characteristics of nanocrystalline carbon based FET based on channel engineering and gate engineering are studied. Based on the multibody quantum NEGF method, the channel current characteristics of nanocrystalline carbon based devices doped with heterogate and channel are studied. The results show that the carbon based devices have similar commonness with the conventional FET, such as the increase of DIBL effect when the gate length is reduced. The decrease of gate oxygen thickness can improve the subthreshold characteristics of the device. Compared with the conventional single-gate heterogate and channel light-doped devices not only have better gate control ability but also can suppress the short-channel effect better and have lower leakage current and higher current-to-switch ratio. In addition, based on the quantum transport model, the carrier transport characteristics of carbon-based devices are discussed, and the theoretical problems of device design near the ultimate reduction limit are explored. Taking the transistor index 2016-2024 proposed by ITRS10) as the target parameter, the engineering design optimization of the new device structure is carried out. Based on the electrical characteristics of the device, the model of Verilog-A lookup table is used to optimize the structure of the new device, which is based on the Verilog-A lookup table model. HSpice is used to analyze the electrical characteristics of several novel circuits, including LHCINV based on heterogate and light-doped CNTFET inverter, and LHCSRAMsbased on 6-transistor static random access memory (SRAM). The results show that LHCINV has lower rise and fall delay, lower power consumption and power delay product PDPU. LHCSRAMs have lower write data delay, lower power consumption and PDP.P3) using Schrodinger equation to solve the gate tunneling current of FET. By using the HSpice analysis of the lookup table model, it is found that the gate tunneling current of the oxide layer of the device will affect the logic function of the circuit and lead to the circuit logic operation error.
【学位授予单位】：南京邮电大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386

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