国标UHF RFID标签芯片数字电路后端设计

发布时间：2018-06-25 07:10

本文选题：射频识别 + 超高频　；参考：《杭州电子科技大学》2015年硕士论文

【摘要】：射频识别(Radio Frequency Identification,RFID)产生于上世纪80年代而后迅速发展起来的一种无线自动识别技术,它利用无线射频信号去识别某一物品并对其进行读写操作,该过程既不需要人工参与也不需要与物品有机械或者光学接触。随着集成电路产业技术的发展,低频和高频RFID技术已经应用于我们生活的方方面面,而超高频RFID技术正处于迅速发展阶段。首个超高频RFID国家标准《信息技术射频识别800/900MHz空中接口协议》于2014年5月1日开始实施,从此国内一些知名的企业纷纷开始研发相应的产品。本文主要内容是基于该国家标准协议的数字集成电路后端设计,该设计是实现芯片成功制造所必不可少的环节。本文首先分析了提出国标UHF RFID协议的背景及意义,并对该协议的主要内容作了简单介绍。然后详细介绍了基于Synopsys公司IC Compiler工具的数字集成电路后端设计的过程,其一般包括:设计数据准备、设计库建立、时序约束设置、布图规划、布局、时钟树综合、布线、可制造性设计等。最后,分别使用Synopsys公司的Prime Time、Formality和VCS工具对布局布线后设计进行了静态时序分析、形式验证和后仿真;此外,还使用Mentor Graphics公司的Calibre工具对国标UHF RFID全芯片版图进行了DRC和LVS验证。验证结果表明数字版图通过了静态时序分析、形式验证和后仿真,国标UHF RFID全芯片版图也通过了DRC和LVS验证,因此可以将全芯片版图的GDSII格式文件提交给SMIC工艺厂进行生产。本次流片采用的是SMIC 0.18μm的2P4M EEPROM工艺,该工艺是现在最先进的EEPROM工艺之一。
[Abstract]:Radio Frequency Identification (RFID) is a kind of wireless automatic identification technology developed rapidly since 1980s. It uses radio frequency signal to identify an object and read and write it. The process requires neither manual participation nor mechanical or optical contact with objects. With the development of integrated circuit technology, low-frequency and high-frequency RFID technology has been applied in all aspects of our lives, while UHF RFID technology is in a rapid development stage. The first UHF RFID national standard "Information Technology Radio Frequency Identification 800 / 900MHz Air Interface Protocol" was implemented on May 1, 2014. Since then, some well-known domestic enterprises have begun to develop the corresponding products. The main content of this paper is the design of digital integrated circuit back-end based on the national standard protocol, which is essential to the successful fabrication of the chip. In this paper, the background and significance of UHF RFID protocol are analyzed, and the main content of UHF RFID protocol is briefly introduced. Then, the design process of digital IC back-end based on the IC Compiler tool of Synopsys is introduced in detail, which includes: design data preparation, design library establishment, timing constraint setting, layout planning, layout, clock tree synthesis, wiring, etc. Manufacturability design, etc. Finally, using Synopsys' Prime time formality and VCS tools, the static timing analysis, formal verification and post-simulation of the layout and routing design are carried out respectively. In addition, the UHF RFID full-chip layout is verified by DRC and LVS using calibre tool of Mentor Graphics. The verification results show that the digital layout has passed the static timing analysis, formal verification and post-simulation, and the UHF RFID full-chip layout has been verified by DRC and LVS, so the GDSII format file of the full-chip layout can be submitted to SMIC factory for production. SMIC 0.18 渭 m 2P4M EEPROM process is used in this flow sheet, which is one of the most advanced EEPROM processes.
【学位授予单位】：杭州电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TP391.44;TN79

【二级参考文献】