硅基片上射频集成无源器件的去嵌入表征方法研究

发布时间：2018-06-28 05:23

  本文选题：无源器件 + 共面波导　； 参考：《电子元件与材料》2016年03期

【摘要】：硅基片上射频集成无源器件进行S参数测试时不可避免受到焊盘寄生效应的影响。针对这一问题,提取了三组不同长度硅基共面波导型传输线的S参数,基于级联理论的三种去嵌入方法被用于传输线模型分布参数的精确表征,并结合电磁仿真综合对比。结果表明:相对于其他两种常用去嵌入方法,"混合"法得到的S参数曲线与无焊盘仿真最为接近(平均偏差S_(11)≤3.392%,S_(21)≤5.184%),且削弱了去嵌入过程中测量误差的影响,有效减少了分布参数曲线波动。
[Abstract]:The S parameters of RF integrated passive devices on silicon substrate are inevitably affected by the parasitic effect of solder pad. In order to solve this problem, three sets of S parameters of coplanar waveguide transmission lines with different lengths are extracted. The three desembling methods based on cascade theory are used to characterize the distribution parameters of transmission line model accurately and compared with electromagnetic simulation. The results show that the S parameter curve obtained by the "hybrid" method is the closest to the non-pad simulation (the average deviation S _ (11) 鈮，

本文编号：2076912