用于高性能锁相环的CMOS振荡器研究

发布时间：2018-08-11 18:57

【摘要】：日益普及的无线通讯网络加快了复杂无线设备系统的革新和部署,射频集成电路设计的集成化是通信系统发展的一个重要方向。振荡器是通信系统的核心部件,它的性能在很大程度上决定了系统的指标。振荡器关键的性能指标包括工作频率、可调范围、相位噪声(Phase Noise)、功耗(Power Consumption)等。而在不同的应用场景和系统中,对振荡器的指标要求也存在较大差异。例如注入锁定的毫米波频段的振荡器设计中,在满足工作频率范围要求的同时降低功耗显得非常有意义。而在较低频率的GHz工作频率范围,降低功耗、优化面积和频率覆盖范围则成为常见的设计要求。论文首先回顾了目前主流振荡器的拓扑类型和电路设计,并进行了多种关键技术的研究。在毫米波频率的注入锁定振荡器的设计中,本文主要研究了低功耗技术。通过设计一种电源端的注入结构,该振荡器能够兼顾其它指标的同时工作在较低的电压下。该电路在Tower JAZZ 0.18μm SiGe BiCMOS工艺进行了流片验证,测试结果表明该振荡器能够工作锁定在53.2GHz的频率,核心电路在0.7V的供电电压下功耗为3mW,面积为0.24mm~2。论文同时研究了在GHz频率范围内的大带宽振荡器。文中分析了电感电压控制振荡器的理论模型和相位噪声模型,介绍了多比特控制的振荡器各个模块对振荡器Q值的影响。文中给出了电路恒定子带设计和振荡器相噪的优化放法,使每条子带上的频率均满足指标要求。优化后的振荡器的频率范围为3.62-4.35GHz,调谐增益Kvco变化范围为73.8MHz/(0.8V)到75.9MHz/(0.8V),变化范围约为2.76%,相位噪声在1MHz处可达到-117dBc/Hz。文中也介绍了一些新型的振荡器设计结构,例如有源电感振荡器和变压器并应用于电流控制型锁相环。这种锁相环结构无需采用传统电路的滤波器结构,极大地减小了电路面积和成本。设计的电流型锁相环电路能达到5.12-5.4GHz的锁定范围,而且核心电路模块的面积仅为8100μm2。
[Abstract]:The increasingly popular wireless communication network speeds up the innovation and deployment of complex wireless equipment systems. The integration of RF integrated circuit design is an important direction of communication system development. Oscillator is the core component of communication system, its performance determines the index of the system to a great extent. The key performance parameters of the oscillator include operating frequency, adjustable range, phase noise (Phase Noise), power (Power Consumption) and so on. However, in different application scenarios and systems, the requirements for the oscillator are also quite different. For example, in the design of an injection-locked millimeter-wave oscillator, it is significant to reduce power consumption while satisfying the operating frequency range. However, in the lower frequency range of GHz, reducing power consumption, optimizing area and frequency coverage are common design requirements. Firstly, the topology type and circuit design of the mainstream oscillator are reviewed, and several key technologies are studied. In the design of millimeter-wave frequency injection locked oscillator, the low power technology is studied in this paper. By designing an injection structure at the power supply end, the oscillator can work at a lower voltage, taking into account other parameters at the same time. The circuit is verified in Tower JAZZ 0.18 渭 m SiGe BiCMOS process. The test results show that the oscillator can work at the frequency of 53.2GHz. The core circuit has a power consumption of 3 MW and an area of 0.24 mm / 2 at 0.7V power supply voltage. At the same time, the large bandwidth oscillator in GHz frequency range is studied. In this paper, the theoretical model and phase noise model of inductance voltage controlled oscillator are analyzed, and the influence of each module of multi-bit controlled oscillator on the Q value of oscillator is introduced. In this paper, the constant subband design of the circuit and the optimal discharge method of the oscillator phase noise are given, so that the frequency of each sub-band can meet the requirements of the target. The frequency range of the optimized oscillator is 3.62-4.35 GHz, the tunable gain Kvco ranges from 73.8MHz/ (0.8V) to 75.9MHz/ (0.8V), and the range is about 2.76. the phase noise can reach -117dBc / Hz at 1MHz. Some new oscillator structures, such as active inductor oscillator and transformer, are also introduced in this paper. This kind of PLL structure does not need the filter structure of traditional circuit, which greatly reduces the circuit area and cost. The designed current-mode PLL circuit can achieve the locking range of 5.12-5.4GHz, and the area of the core circuit module is only 8100 渭 m ~ 2.
【学位授予单位】：浙江大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN752

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