基本单元电路的NBTI机制下性能退化分析及改进方法研究
发布时间：2018-08-16 12:26
【摘要】：自摩尔定律诞生以来,半导体技术已经按照该规律发展了半个世纪。2013年国际半导体技术发展路线图(ITRS, International Technology Roadmap for Semiconductor)预测,到2017年半导体器件特征尺寸将达到7nm。随着器件尺寸的不断缩小,当栅极氧化层的电场强度升高到高于6MV/cm时,P-MOSFET的负偏压温度不稳定性(NBTI, Negative Bias Temperature Instability)成为限制纳米器件及集成电路寿命的主导因素。本文详细介绍了业界接受最广的反应扩散模型(RD model, Reaction Diffusion model),并基于此模型主要做了如下工作：1.对传统的基于SPICE的模拟电路仿真设计流程进行改进,在模拟电路设计后端增加考虑NBTI效应的可靠性分析、改进及验证等步骤,使该流程适应于纳米工艺下的模拟电路设计,并提高电路抗NBTI退化的能力；2.基于RD模型,对简单电流镜、Cascode电流镜、宽摆幅电流镜等基准电路中NBTI效应的退化进行了系统的仿真分析,得到Cascode电流镜在P-MOSFET晶体管发生同等退化时电路的退化最严重,宽摆幅电流镜电路的退化最小,这可以通过适当增加晶体管的宽长比弥补NBTI退化量。但是输出电流复制参考电流的能力没有受到影响；3.对单级放大器、差分放大器、运算放大器等放大电路中NBTI效应的退化进行了系统的仿真分析,结果表明-3dB带宽的退化量是所有参数的退化中最严重的。运用可靠性设计方法,笔者从电路结构对两级运放进行改进,用电流镜代替电路中的关键器件,通过电流镜中的电阻R引入反馈,抵消了NBTI退化对电路的影响,使两级运放的-3dB带宽的退化量从27%降到了1%左右,共模抑制比、相位裕度等参数的退化量被降低到了1%以内,显著提高了两级运放抗NBTI退化的能力。
[Abstract]:Since the birth of Moore's Law, semiconductor technology has been developed in accordance with this law for half a century. The 2013 International Semiconductor Technology Development Roadmap (ITRS, International Technology Roadmap for Semiconductor) predicts that the characteristic size of semiconductor devices will reach 7 nm by 2017. With the decrease of device size, the negative bias temperature instability (NBTI, Negative Bias Temperature Instability) of P-MOSFET becomes the dominant factor limiting the lifetime of nanoscale devices and integrated circuits when the electric field intensity of the gate oxide layer is higher than that of 6MV/cm. In this paper, the most widely accepted reaction-diffusion model, (RD model, Reaction Diffusion model), is introduced in detail and based on this model, the following work is done: 1. The traditional simulation design flow of analog circuit based on SPICE is improved, and the steps of reliability analysis, improvement and verification considering NBTI effect are added to the back end of analog circuit design, so that the flow can be adapted to the analog circuit design under nanotechnology. It also improves the ability of the circuit to resist NBTI degradation. Based on Rd model, the degradation of NBTI effect in reference circuits such as simple current mirror and wide swing current mirror is simulated and analyzed systematically. It is concluded that the degradation of Cascode current mirror is the most serious when the same degradation occurs in P-MOSFET transistors. The degradation of the wide swing current mirror circuit is the least, which can compensate the NBTI degradation by increasing the aspect ratio of the transistor appropriately. But the output current's ability to replicate the reference current is not affected. The degradation of NBTI effect in single-stage amplifiers, differential amplifiers and operational amplifiers is analyzed systematically. The results show that the degradation of -3dB bandwidth is the most serious of all parameters. Using the reliability design method, the author improves the two-stage operational amplifier from the circuit structure, uses the current mirror to replace the key device in the circuit, and introduces feedback through the resistance R in the current mirror, which counteracts the influence of NBTI degradation on the circuit. The degradation of -3dB bandwidth of the two-stage operational amplifier is reduced from 27% to about 1%, and the degradation of the common mode rejection ratio and phase margin is reduced to less than 1%, which greatly improves the ability of the two-stage operational amplifier to resist NBTI degradation.
【学位授予单位】：华东师范大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN402
本文编号：2185978
[Abstract]:Since the birth of Moore's Law, semiconductor technology has been developed in accordance with this law for half a century. The 2013 International Semiconductor Technology Development Roadmap (ITRS, International Technology Roadmap for Semiconductor) predicts that the characteristic size of semiconductor devices will reach 7 nm by 2017. With the decrease of device size, the negative bias temperature instability (NBTI, Negative Bias Temperature Instability) of P-MOSFET becomes the dominant factor limiting the lifetime of nanoscale devices and integrated circuits when the electric field intensity of the gate oxide layer is higher than that of 6MV/cm. In this paper, the most widely accepted reaction-diffusion model, (RD model, Reaction Diffusion model), is introduced in detail and based on this model, the following work is done: 1. The traditional simulation design flow of analog circuit based on SPICE is improved, and the steps of reliability analysis, improvement and verification considering NBTI effect are added to the back end of analog circuit design, so that the flow can be adapted to the analog circuit design under nanotechnology. It also improves the ability of the circuit to resist NBTI degradation. Based on Rd model, the degradation of NBTI effect in reference circuits such as simple current mirror and wide swing current mirror is simulated and analyzed systematically. It is concluded that the degradation of Cascode current mirror is the most serious when the same degradation occurs in P-MOSFET transistors. The degradation of the wide swing current mirror circuit is the least, which can compensate the NBTI degradation by increasing the aspect ratio of the transistor appropriately. But the output current's ability to replicate the reference current is not affected. The degradation of NBTI effect in single-stage amplifiers, differential amplifiers and operational amplifiers is analyzed systematically. The results show that the degradation of -3dB bandwidth is the most serious of all parameters. Using the reliability design method, the author improves the two-stage operational amplifier from the circuit structure, uses the current mirror to replace the key device in the circuit, and introduces feedback through the resistance R in the current mirror, which counteracts the influence of NBTI degradation on the circuit. The degradation of -3dB bandwidth of the two-stage operational amplifier is reduced from 27% to about 1%, and the degradation of the common mode rejection ratio and phase margin is reduced to less than 1%, which greatly improves the ability of the two-stage operational amplifier to resist NBTI degradation.
【学位授予单位】：华东师范大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN402
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