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基于FPGA的高速串行CMOS工业相机

发布时间:2018-08-24 10:54
【摘要】:高速接口的数字相机由于采用了成熟的计算机高速数据传输技术,充分利用已有计算机资源,采用串行高速数据传输方式,将传统的图像采集卡省去,从而简化连接电缆;在获得高传输速率的同时,产品成本也大大降低,故成为众多机器视觉系统的首选。论文分析了工业相机的基本框架,对几种主控芯片的主流嵌入式方案行对比,简单介绍了工业相机实现的基本技术,并对图像传感器,外部存储设备和外部接口芯片进行了选择。最终本文选择ONSEM Ⅰ公司的VITA-1300一款130万CMOS作为本系统的前段图像传感器,Spartan-6的一款FPGA作为系统的主控核心,输出接口选择USB3.0输出。在分析方案的基础上论文还完整实现了这个方案的软硬件系统设计,并进行测试和验证。论文基于FPGA的高速串行工业相机系统的设计主要工作包括:1)硬件上采用Xilinx公司Spartan-6系列的高性能FPGA作为系统图像采集处理核心,完成FPGA相关电路设计、DDR2电路设计、CMOS及外围电路设计以及电源设计等,完成FPGA核心板和CMOS板的PCB设计工作。2)利用Verilog语言和ISE系统工具完成FPGA程序编写和调试,主要功能包括数据接收、协议解析,数据缓存,CFA插值,数据空间转换,图形矫正等算法,良好地展示了FPGA优秀的现场可编辑能力和流水线处理特性。3)系统地软硬件测试,本系统可以高速采集1280*1024分辨率的图像,帧频可到150帧每秒。
[Abstract]:The digital camera with high speed interface adopts mature computer high speed data transmission technology, makes full use of existing computer resources, adopts serial high speed data transmission mode, saves the traditional image acquisition card, thus simplifies connecting cable; At the same time, the cost of the product is greatly reduced, so it becomes the first choice for many machine vision systems. This paper analyzes the basic frame of industrial camera, compares several mainstream embedded schemes of main control chip, briefly introduces the basic technology of industrial camera, and introduces the image sensor. External storage devices and external interface chips are selected. Finally, a 1.3 million CMOS of VITA-1300 of ONSEM I Company is chosen as the FPGA of Spartan-6 as the main control core of the system, and the output interface of USB3.0 is chosen as the output of the system. On the basis of the analysis of the scheme, the software and hardware system design of the scheme is implemented, tested and verified. In this paper, the design of the high-speed serial industrial camera system based on FPGA includes: 1) the high performance FPGA of Spartan-6 series of Xilinx company is used as the core of image acquisition and processing on the hardware. The design of FPGA related circuit and the design of peripheral circuit and power supply are completed. The PCB design of FPGA core board and CMOS board is completed. 2) the FPGA program is written and debugged by using Verilog language and ISE system tools. The main functions include data receiving, protocol parsing, data cache CFA interpolation, data space conversion, graphic correction and so on. The software and hardware tests of FPGA are well demonstrated. The system can collect 1280 1024 resolution images at high speed, and the frame rate can reach 150 frames per second.
【学位授予单位】:浙江大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TP391.41;TN791

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