氧化锌薄膜晶体管的模拟研究
发布时间：2018-10-05 13:28
【摘要】：随着信息时代的发展,在显示技术领域中,有源驱动平板显示技术的发展越来越广泛和深入。薄膜晶体管(Thin-film Transistor,TFT)作为有源矩阵液晶显示器件(AMLCD)的重要元件,也得到了广泛的关注。氧化锌薄膜晶体管(Zn O TFT)因具有迁移率高、适于低温生产、透光性好等优点在柔性和透明电子学中具有广泛的应用前景。Zn O TFT不仅能够解决硅基TFT不透明、光敏性差、制备工艺复杂的问题,还有效地避免了有机薄膜晶体管载流子迁移率低、功耗高的现象。因此,越来越多的机构开始了对Zn O TFT的研究历程。随着集成电路的高速发展,依靠工艺流片的方式进行工艺级的条件设计和优化是绝对不可能的,因此,实现集成电路加工工艺过程的数字化模拟和仿真势在必行。然而,到目前为止,关于氧化锌薄膜晶体管的研究工作主要集中在制备工艺上,器件建模的却很有限。本文主要对双栅Zn O TFT进行了建模和器件仿真,模型基于其他课题组已提出的禁带中央高斯分布的深能级缺陷态以及呈指数分布的带尾态缺陷态模型。首先对双栅Zn O TFT的三种工作模式进行了对比,最终确定采用顶栅-底栅短路工作模式进行接下来的研究,接着研究了深能级和带尾态缺陷态对器件性能的影响,还有源漏电极位置及厚度对器件性能的影响。结果表明,带尾态缺陷态主要影响器件的开态特性,深能级则对开启电压影响较大;源漏电极顶接触的器件特性优于底接触。在以上基础上提出了双栅复合介质Zn O TFT,栅绝缘层使用Si O2-Hf O2-Si O2夹心结构,通过对比双栅单介质Zn O TFT和双栅复合介质Zn O TFT性能发现双栅复合介质Zn O TFT性能更加优越。从沟道中载流子分布、沟道能带图分布、晶界势垒高度Vb的变化以及沟道中电场、电势的分布等方面对器件性能的改善机理进行了研究。对采用高k材料的薄膜晶体管的影响因素进行了研究,高k材料介电常数越大,器件性能越好;高k材料膜厚越小、在绝缘层中所占比重越大,器件性能越好;采用不同high-k材料时,栅极对沟道的控制作用也不一样。最后,还研究了晶界势垒高度Vb的变化与阈值电压之间的关系,得出Vb最大时所对应的VGS与仿真所抽取的阈值电压基本一致的结论。
[Abstract]:With the development of information age, the development of active drive flat panel display technology is more and more extensive in the field of display technology. Thin film transistor (Thin-film Transistor,TFT), as an important component of active matrix liquid crystal display (AMLCD), has been paid more and more attention. Zinc oxide thin film transistor (Zn O TFT) has a wide application prospect in flexible and transparent electronics because of its high mobility, suitable for low temperature production and good transmittance. Zno TFT can not only solve the opacity of silicon based TFT, but also have poor Guang Min property. The complex preparation process effectively avoids the phenomenon of low carrier mobility and high power consumption in organic thin film transistors. Therefore, more and more institutions began to study the course of Zn O TFT. With the rapid development of integrated circuit, it is absolutely impossible to design and optimize the process level condition by the way of process flow sheet. Therefore, it is imperative to realize the digital simulation and simulation of integrated circuit processing process. However, so far, the research on ZnO thin film transistors is mainly focused on the fabrication process, but the device modeling is very limited. In this paper, the modeling and device simulation of double-gate Zn O TFT are mainly carried out. The model is based on the deep level defect state in the center Gao Si distribution of the forbidden band and the defect state model with the exponential distribution in the band tail state, which has been proposed by other research groups. In this paper, the three working modes of double-gate Zn O TFT are compared, and it is determined that the top-bottom gate short-circuit mode is used for the following research, and then the effects of deep energy level and band-tail defect state on the performance of the device are studied. The effect of the location and thickness of the source leakage electrode on the performance of the device is also discussed. The results show that the defect state with tail state mainly affects the open state characteristics of the device, while the deep level has a greater effect on the opening voltage, and the characteristics of the device with the top contact of the source and leakage pole are better than that of the bottom contact. On the basis of the above, it is proposed that the double gate composite dielectric Zn O TFT, gate insulation layer uses Si O2-Hf O2-Si O 2 sandwich structure. By comparing the performance of double gate single dielectric Zn O TFT and double gate composite dielectric Zn O TFT, it is found that the double gate composite dielectric Zn O TFT performance is better than that of double gate composite dielectric Zn O TFT. The improvement mechanism of the device performance was studied from the aspects of carrier distribution, channel energy band distribution, grain boundary barrier height (Vb) change, and the distribution of electric field and potential in the channel. The influence factors of thin film transistor with high k material are studied. The higher the dielectric constant of high k material, the better the performance of the device, the smaller the film thickness of high k material is, the greater the proportion in the insulating layer is, and the better the performance of the device is. With different high-k materials, the gate has different control effect on the channel. Finally, the relationship between the threshold voltage and the variation of the grain boundary barrier height (Vb) is studied, and the conclusion that the VGS corresponding to the maximum value of Vb is basically consistent with the threshold voltage extracted by simulation is obtained.
【学位授予单位】：江南大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN321.5
本文编号：2253565
[Abstract]:With the development of information age, the development of active drive flat panel display technology is more and more extensive in the field of display technology. Thin film transistor (Thin-film Transistor,TFT), as an important component of active matrix liquid crystal display (AMLCD), has been paid more and more attention. Zinc oxide thin film transistor (Zn O TFT) has a wide application prospect in flexible and transparent electronics because of its high mobility, suitable for low temperature production and good transmittance. Zno TFT can not only solve the opacity of silicon based TFT, but also have poor Guang Min property. The complex preparation process effectively avoids the phenomenon of low carrier mobility and high power consumption in organic thin film transistors. Therefore, more and more institutions began to study the course of Zn O TFT. With the rapid development of integrated circuit, it is absolutely impossible to design and optimize the process level condition by the way of process flow sheet. Therefore, it is imperative to realize the digital simulation and simulation of integrated circuit processing process. However, so far, the research on ZnO thin film transistors is mainly focused on the fabrication process, but the device modeling is very limited. In this paper, the modeling and device simulation of double-gate Zn O TFT are mainly carried out. The model is based on the deep level defect state in the center Gao Si distribution of the forbidden band and the defect state model with the exponential distribution in the band tail state, which has been proposed by other research groups. In this paper, the three working modes of double-gate Zn O TFT are compared, and it is determined that the top-bottom gate short-circuit mode is used for the following research, and then the effects of deep energy level and band-tail defect state on the performance of the device are studied. The effect of the location and thickness of the source leakage electrode on the performance of the device is also discussed. The results show that the defect state with tail state mainly affects the open state characteristics of the device, while the deep level has a greater effect on the opening voltage, and the characteristics of the device with the top contact of the source and leakage pole are better than that of the bottom contact. On the basis of the above, it is proposed that the double gate composite dielectric Zn O TFT, gate insulation layer uses Si O2-Hf O2-Si O 2 sandwich structure. By comparing the performance of double gate single dielectric Zn O TFT and double gate composite dielectric Zn O TFT, it is found that the double gate composite dielectric Zn O TFT performance is better than that of double gate composite dielectric Zn O TFT. The improvement mechanism of the device performance was studied from the aspects of carrier distribution, channel energy band distribution, grain boundary barrier height (Vb) change, and the distribution of electric field and potential in the channel. The influence factors of thin film transistor with high k material are studied. The higher the dielectric constant of high k material, the better the performance of the device, the smaller the film thickness of high k material is, the greater the proportion in the insulating layer is, and the better the performance of the device is. With different high-k materials, the gate has different control effect on the channel. Finally, the relationship between the threshold voltage and the variation of the grain boundary barrier height (Vb) is studied, and the conclusion that the VGS corresponding to the maximum value of Vb is basically consistent with the threshold voltage extracted by simulation is obtained.
【学位授予单位】：江南大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN321.5
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