应变RF LDMOSFET的研究

发布时间：2018-10-19 09:30

【摘要】：应变技术通过对能带进行调制以减小载流子有效质量与散射率,提升载流子迁移率从而提升器件性能,且与CMOS工艺兼容,被广泛运用于MOS器件中。传统的接触刻蚀阻挡层(Contact Etch Stop Layer,CESL)技术难以同时提升RF LDMOSFET的沟道区和漂移区载流子迁移率。另外随着器件尺寸进一步缩小,传统应变技术或传统PSOI技术均难以既提升RF LDMOSFET器件性能又有效抑制短沟道效应。针对以上问题,本文通过理论与仿真分析,对应变RF LDMOSFET开展了如下研究:首先,运用Sentaurus仿真分析了漂移区正应变射频LDMOSFET的力学特性和电学特性。为解决漂移区应力反型,载流子迁移率降低的问题,提出的漂移区正应变射频器件通过在漂移区表面淀积与其他区域不同性质的应力膜,成功地向沟道和漂移区引入了同型应力,实现了同时提升漂移区和沟道载流子迁移率的目的,使得漂移区迁移率提升达24%。传统PSOI RF LDMOSFET器件的顶层硅厚度减薄使漂移区变得狭长、漂移区应力反型均使漂移区电阻增大。漂移区正应变射频器件的漂移区应力与沟道同型,使得漂移区载流子迁移率获得较大提升导通电阻降低。此外高漏压低栅压偏置时漂移区表层处于耗尽状态,此时导通电阻和频率特性的提升主要由沟道迁移率决定,因此相比无应变器件,普通CESL应变和新型CESL应变的截止频率提升幅度相近,提升幅度分别为24%与28%;高栅压时漂移区表面电子积累,此时由于普通CESL应变使得漂移区载流子迁移率降低,因此沟道正应变器件和常规应变器件相比普通无应变射频器件,对应高栅压时的截止频率分别提升18.9%和5.5%。其次,运用Sentaurus仿真分析了超薄应变PSOI RF LDMOSFET的力学特性和电学特性。Sentaurus Sdevice有限元仿真软件仿真表明超薄应变PSOI RF LDMOS器件的驱动能力相对无应变体硅射频LDMOS提升达73%,大于超薄SOI单独作用(提升37.2%)与应变技术单独作用(提升24.6%)的简单叠加。超薄应变PSOILDMOSFET兼具应变技术和超薄SOI技术的优点,沟道下方的局部BOX结构既能有效抑制短沟道效应,使器件DIBL从47mV/V降低到28mV/V,还能有效增大传统CESL应变体硅器件沟道的应力,进一步提升沟道载流子迁移率。
[Abstract]:Strain technique is widely used in MOS devices because it modulates the energy band to reduce the effective mass and scattering rate of carriers and to enhance the mobility of carriers. It is compatible with CMOS process and is widely used in MOS devices. It is difficult to improve the carrier mobility of RF LDMOSFET in both channel region and drift region by conventional contact etching barrier layer (Contact Etch Stop Layer,CESL) technique. In addition, with the further reduction of the device size, both the traditional strain technique and the traditional PSOI technology can not only improve the performance of RF LDMOSFET devices but also effectively suppress the short channel effect. In order to solve the above problems, the following researches on strain RF LDMOSFET are carried out through theoretical and simulation analysis. Firstly, the mechanical and electrical characteristics of positive strain RF LDMOSFET in drift region are analyzed by Sentaurus simulation. In order to solve the problem of stress inversion in drift region and decrease of carrier mobility, the proposed positive strain RF device in drift region is deposited on the surface of drift region by a stress film with different properties from other regions. The isomorphic stress is introduced into the channel and drift region successfully, and the mobility of drift region and channel carrier is raised simultaneously, and the mobility of drift region increases to 24%. The thickness of silicon in the top layer of conventional PSOI RF LDMOSFET devices decreases and the drift region becomes narrow and narrow, and the drift resistance increases with the stress inversion in the drift region. The drift region stress of the positive strain RF device in drift region is the same as that of the channel, which reduces the mobility of carrier in drift region to a large extent. In addition, the surface layer of the drift region is depleted when the gate voltage is bias with high leakage pressure. The increase of the on-resistance and frequency characteristics is mainly determined by channel mobility, therefore, compared with the strain-free devices, the on resistance and frequency characteristics of the drift region are mainly determined by the channel mobility. The cutoff frequency of the ordinary CESL strain and the new CESL strain are similar to that of the new CESL strain (24% and 28% respectively), the electron accumulation on the surface of the drift region is observed at high gate voltage, and the carrier mobility in the drift region is decreased due to the ordinary CESL strain. Therefore, the cutoff frequencies of channel positive strain devices and conventional strain devices are 18.9% and 5.5% higher than those of conventional strain-free RF devices respectively at high gate voltages. Secondly, The mechanical and electrical characteristics of ultra-thin strain PSOI RF LDMOSFET are analyzed by Sentaurus simulation. The. Sentaurus Sdevice finite element simulation software shows that the driving ability of ultra-thin strain PSOI RF LDMOS device is higher than that of strain-free bulk silicon RF LDMOS up to 73, larger than that of ultra-thin. Simple superposition of SOI alone (37.2% increase) and strain technique alone (24.6% increase). The ultra-thin strain PSOILDMOSFET has the advantages of both the strain technique and the ultra-thin SOI technique. The local BOX structure below the channel can effectively suppress the short channel effect, reduce the DIBL from 47mV/V to 28 MV / V, and effectively increase the channel stress of the traditional CESL strain volume silicon device. Further increase channel carrier mobility.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386

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