基于XDL网表的SRAM型FPGA单粒子软错误敏感性分析
发布时间：2018-10-25 15:43
【摘要】：随着空间仪器所承担任务的复杂性与精密性逐步提升,具备高性能,低成本和可重配置等优势的SRAM型FPGA在空间仪器中的应用也越来越多,这给空间仪器带来性能上提升的同时也引来了诸多问题,其中单粒子效应造成的影响尤为突出,且随着集成电路特征尺寸的逐渐减少,这一影响还会越来越严重。对FPGA系统单粒子软错误敏感性的分析能够找到FPGA系统中受单粒子效应影响最为严重的地方,抓住设计中抗单粒子软错误的薄弱环节。如此,在地面即可预言系统在轨的运行情况,有针对性的进行系统加固和制定应对措施,保证系统的正常运行。目前业内公认的评估器件单粒子软错误敏感性的方法为高能粒子实验和故障注入,前者成本高昂,资源紧张,后者注入时间长,效率低。本文研究的基于XDL网表的SRAM型FPGA单粒子软错误敏感性分析方法,能够快速高效的分析系统单粒子软错误,且成本低廉,是未来评估系统单粒子软错误敏感性的重要手段。研究将从Xilinx FPGA设计中得到的.ncd文件出发,得到XDL网表,再基于Rapidsmith开发用于提取电路结构信息,进行系统单粒子软错误敏感性分析的软件。论文研究主要工作包括:(1)敏感点的判断方法。论文研究的敏感点的判断方法可以把敏感点定位到具体的每一个配置位,具有更高准确度,并基于Rapidsmith开发了XDL网表的分析软件,目前支持XC4VSX55 FPGA系统的单粒子软错误敏感性分析。(2)XDL网表中FPGA资源的解析。论文研究了XDL网表描述的FPGA资源,解读了敏感资源在XDL网表中的描述,阐述了XDL网表的语法结构、详细解析了其描述内容和FPGA的底层电路资源的对应关系,强化了人们对XDL网表与FPGA资源的认知,弥补了国内此类内容描述不清的缺点。(3)配置文件中FPGA资源的解析。论文完成了XDL网表描述的FPGA资源与配置位的映射关系,纠正了Xilinx官网上发布的XC4VSX55芯片帧地址排布的错误,并进一步探究了PIPs资源与配置位的对应关系,解析了帧结构,基本完成了XC4VSX55芯片配置数据的解析,且研究方法具有通用性,适用于Virtex-5及更高系列芯片。
[Abstract]:With the increasing complexity and precision of space instruments, SRAM type FPGA, which has the advantages of high performance, low cost and reconfiguration, has been used more and more in space instruments. While improving the performance of space instruments, it also leads to many problems, among which the effect of single particle effect is especially prominent, and the effect will become more and more serious with the decreasing of the feature size of integrated circuits. By analyzing the sensitivity of single particle soft error in FPGA system, we can find out the most serious effect of single particle effect in FPGA system, and grasp the weak link in the design against single particle soft error. In this way, the operation of the system in orbit can be predicted on the ground, and the system reinforcement and countermeasures can be made to ensure the normal operation of the system. At present, high-energy particle experiments and fault injection are widely used to evaluate the sensitivity of single particle soft error in devices. The former is costly and the resources are tight, while the latter has long injection time and low efficiency. The sensitivity analysis method of single particle soft error of SRAM type FPGA based on XDL net table is studied in this paper. It can analyze single particle soft error of system quickly and efficiently, and the cost is low. It is an important method to evaluate the sensitivity of single particle soft error of system in the future. Starting from the. Ncd file obtained from the Xilinx FPGA design, the paper obtains the XDL net table, and then develops a software based on Rapidsmith to extract the circuit structure information and analyze the sensitivity of the single particle soft error in the system. The main work of this paper is as follows: (1) the judgment method of sensitive points. The judgment method of sensitive points studied in this paper can locate the sensitive points to every configuration bit and have higher accuracy. The analysis software of XDL net table is developed based on Rapidsmith. The single particle soft error sensitivity analysis for XC4VSX55 FPGA systems is supported at present. (2) the analysis of FPGA resources in XDL net tables. In this paper, the FPGA resources described by the XDL net table are studied, the description of the sensitive resources in the XDL net table is interpreted, the syntax structure of the XDL net table is expounded, and the corresponding relation between the description content and the underlying circuit resources of FPGA is analyzed in detail. It strengthens people's cognition of XDL net tables and FPGA resources, and makes up for the shortcomings of unclear description of this kind of content in China. (3) parsing of FPGA resources in configuration files. This paper completes the mapping relationship between FPGA resources and configuration bits described in the XDL net table, corrects the errors of frame address arrangement of XC4VSX55 chips published on Xilinx official network, and further explores the corresponding relationship between PIPs resources and configuration bits, and analyzes the frame structure. The configuration data of XC4VSX55 chip is basically analyzed, and the research method is universal and suitable for Virtex-5 and higher series chips.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：V441;TN791
本文编号：2294138
[Abstract]:With the increasing complexity and precision of space instruments, SRAM type FPGA, which has the advantages of high performance, low cost and reconfiguration, has been used more and more in space instruments. While improving the performance of space instruments, it also leads to many problems, among which the effect of single particle effect is especially prominent, and the effect will become more and more serious with the decreasing of the feature size of integrated circuits. By analyzing the sensitivity of single particle soft error in FPGA system, we can find out the most serious effect of single particle effect in FPGA system, and grasp the weak link in the design against single particle soft error. In this way, the operation of the system in orbit can be predicted on the ground, and the system reinforcement and countermeasures can be made to ensure the normal operation of the system. At present, high-energy particle experiments and fault injection are widely used to evaluate the sensitivity of single particle soft error in devices. The former is costly and the resources are tight, while the latter has long injection time and low efficiency. The sensitivity analysis method of single particle soft error of SRAM type FPGA based on XDL net table is studied in this paper. It can analyze single particle soft error of system quickly and efficiently, and the cost is low. It is an important method to evaluate the sensitivity of single particle soft error of system in the future. Starting from the. Ncd file obtained from the Xilinx FPGA design, the paper obtains the XDL net table, and then develops a software based on Rapidsmith to extract the circuit structure information and analyze the sensitivity of the single particle soft error in the system. The main work of this paper is as follows: (1) the judgment method of sensitive points. The judgment method of sensitive points studied in this paper can locate the sensitive points to every configuration bit and have higher accuracy. The analysis software of XDL net table is developed based on Rapidsmith. The single particle soft error sensitivity analysis for XC4VSX55 FPGA systems is supported at present. (2) the analysis of FPGA resources in XDL net tables. In this paper, the FPGA resources described by the XDL net table are studied, the description of the sensitive resources in the XDL net table is interpreted, the syntax structure of the XDL net table is expounded, and the corresponding relation between the description content and the underlying circuit resources of FPGA is analyzed in detail. It strengthens people's cognition of XDL net tables and FPGA resources, and makes up for the shortcomings of unclear description of this kind of content in China. (3) parsing of FPGA resources in configuration files. This paper completes the mapping relationship between FPGA resources and configuration bits described in the XDL net table, corrects the errors of frame address arrangement of XC4VSX55 chips published on Xilinx official network, and further explores the corresponding relationship between PIPs resources and configuration bits, and analyzes the frame structure. The configuration data of XC4VSX55 chip is basically analyzed, and the research method is universal and suitable for Virtex-5 and higher series chips.
【学位授予单位】：国防科学技术大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：V441;TN791
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