PC104故障监控平台FPGA程序设计
发布时间：2018-10-29 11:17
【摘要】：PC104总线是专为嵌入式控制系统定义的一种工业控制线,其应用广泛,但是内部结构复杂,出现故障不易检测。设计了一种基于FPGA的PC104总线故障自动监控平台,对PC104总线信号进行实时监控和故障检测。该平台利用FPGA程序采集和处理总线信号,并传至上位机处理显示。系统中利用FPGA程序实现其功能模块,包括捕获POST上电自检指令和BIOS自检端口代码、监测总线电压水平、监控时钟和复位等关键信号的质量、控制PC104的自动复位和BIOS设置模式等功能。给出上位机监控结果和FPGA实时检测得到的时序图,反映了该FPGA程序在本系统中满足PC104总线检测的技术要求。
[Abstract]:PC104 bus is a kind of industrial control line defined for embedded control system. It is widely used, but its internal structure is complex, and it is difficult to detect faults. A PC104 bus fault automatic monitoring platform based on FPGA is designed to monitor and detect PC104 bus signals in real time. The platform uses FPGA program to collect and process bus signals and transmit them to the host computer for display. In the system, the FPGA program is used to realize its function module, which includes capturing the POST self-test instruction and BIOS self-checking port code, monitoring the bus voltage level, monitoring the quality of the key signals such as clock and reset, etc. Control PC104 automatic reset and BIOS setup mode and other functions. The monitoring results of the host computer and the timing diagram of the FPGA real-time detection are given, which reflects that the FPGA program meets the technical requirements of the PC104 bus detection in the system.
【作者单位】： 湖北工业大学太阳能高效利用湖北省协同创新中心;湖北省电网智能控制与装备工程技术研究中心;
【基金】：国家自然科学基金(61471162,11605051,61601177) 国家国际科技合作专项(2015DFA10940)
【分类号】：TN79;TP273
，
本文编号：2297544
[Abstract]:PC104 bus is a kind of industrial control line defined for embedded control system. It is widely used, but its internal structure is complex, and it is difficult to detect faults. A PC104 bus fault automatic monitoring platform based on FPGA is designed to monitor and detect PC104 bus signals in real time. The platform uses FPGA program to collect and process bus signals and transmit them to the host computer for display. In the system, the FPGA program is used to realize its function module, which includes capturing the POST self-test instruction and BIOS self-checking port code, monitoring the bus voltage level, monitoring the quality of the key signals such as clock and reset, etc. Control PC104 automatic reset and BIOS setup mode and other functions. The monitoring results of the host computer and the timing diagram of the FPGA real-time detection are given, which reflects that the FPGA program meets the technical requirements of the PC104 bus detection in the system.
【作者单位】： 湖北工业大学太阳能高效利用湖北省协同创新中心;湖北省电网智能控制与装备工程技术研究中心;
【基金】：国家自然科学基金(61471162,11605051,61601177) 国家国际科技合作专项(2015DFA10940)
【分类号】：TN79;TP273
，
本文编号：2297544
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