基于低功耗高速瞬态响应OTA的高可靠抗辐射接口电路设计
[Abstract]:With the rapid development of national aerospace industry, aerospace applications have also put forward new challenges to the design of integrated circuits. RS-422 protocol interface circuits are also widely used in the field of national defense and aerospace because of their stable work and high reliability. The interface circuit widely used in low frequency long line transmission adopts RS-422 protocol specification. This kind of interface circuit is generally composed of transmitter and receiver. The transmitter is composed of simple digital logic and large output drive tube. The receiver at the transmission end is a differential amplifier to identify the attenuation signal on the long line. The traditional receiver is usually implemented by a simple secondary amplifier, which has the advantages of low gain, low speed and high power consumption. In recent years, high speed and low power design have become the focus of attention in the field of integrated circuit design. The whole machine system market has put forward the requirements of high speed and low power consumption, which makes the traditional receiver urgently need to improve and optimize. Reconsider the design to increase response speed and reduce power consumption. Transconductance operational amplifier (OTA) has been widely used because of its current drive and adjustable gain. In this paper, OTA (Operational Transconductance Amplifier) is used to replace the amplifier in the traditional receiver. Through the analysis of the traditional OTA circuit, the design of the receiver circuit is optimized continuously, and the receiver circuit with high speed and low power consumption is finally realized. The designed OTA, circuit has a gain of 60dB, a unit gain bandwidth of (GBW) 2.213MHz, a phase margin of 60.11 掳, a static current of 30gA, a forward voltage pendulum ratio of 44V/ 渭 s and a negative voltage pendulum ratio of 74.9V/ 渭 s. At last, the static current of the RS-422 protocol interface module is only 3.4 Ma, and the transmission delay Tplh is 20.02 nsTphl is 18.5ns. In order to meet the needs of more applications, the ESD (Electro Static Discharge) reliability design and radiation hardening design of the designed interface circuit are carried out in this paper, and the ESD structure is tested by flow sheet. The whole chip anti-ESD capability is over HBM-4000V.
【学位授予单位】:东南大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN402
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