用于光纤陀螺仪的带通Sigma-Delta调制器的研究与设计
发布时间：2019-01-01 10:23
【摘要】：随着无线通信及光纤陀螺技术和集成电路工艺水平的不断进步,对高精度模数转换器(ADCs)的需求也越来越大。Sigma-Delta ADC,相较于奈奎斯特ADC,因其对电路元器件匹配精度不敏感,而在高精度应用方面表现出更大的优势。另一方面,就对窄带中频或射频信号的转换而言,带通转换器比低通转换器的转换效率更高,这也使得带通Sigma-Delta ADC在无线通信和光纤陀螺系统中的应用更为广泛。带通Sigma-Delta ADC由带通Sigma-Delta调制器和数字抽取滤波器组成,其性能主要由调制器决定,而调制器的性能则主要依赖于所使用的谐振器。因此设计一款优良的谐振器结构对于实现高性能ADC来说至关重要。当前谐振器结构主要有三种,即前馈欧拉型、无损离散积分型和双延时型。但是双延时结构相较于其他两种结构的优势在于,对电容失配不敏感。也就是说,双延时结构可以精确地实现中心频率为采样频率的1/4的谐振器。此外,双延时谐振器可以通过级联两个延时单元或使用伪多路径结构来实现。但是级联延时单元需要两个运放,所以功耗会更大;而伪多路径结构的时钟太过复杂,这会使是时钟产生电路的设计变得复杂且会占用较大的芯片面积。为了解决上述问题,本文改进出一款双延时谐振器结构,它只使用一个运放并且它的时钟信号相对伪多路径结构要简单的多。为了验证改进的双延时谐振器的有效性,在0.25μm标准CMOS工艺下设计了一款四阶带通Sigma-Delta调制器。仿真结果表明,在5V电源电压下,该调制器的SNR为116.7dB,功耗为4.87mW,并由此计算出其FOM为11.17W/Hz。
[Abstract]:With the development of wireless communication, fiber optic gyroscope technology and integrated circuit technology, the demand for high precision ADC (ADCs) is also increasing. Compared with Nyquist ADC, Sigma-Delta ADC, is more and more important. Because it is insensitive to the matching accuracy of circuit components, it has more advantages in high precision applications. On the other hand, bandpass converters are more efficient than low-pass converters for narrow band intermediate frequency or RF signal conversion, which makes bandpass Sigma-Delta ADC more widely used in wireless communication and fiber optic gyroscope systems. The bandpass Sigma-Delta ADC consists of a bandpass Sigma-Delta modulator and a digital decimation filter. The performance of the band-pass Sigma-Delta modulator is mainly determined by the modulator, and the performance of the modulator is mainly dependent on the resonator used. So it is very important to design an excellent resonator structure for high performance ADC. At present, there are three main resonator structures: feedforward Euler type, lossless discrete integral type and double delay type. But the advantage of dual delay structure over other two structures is that it is insensitive to capacitance mismatch. That is to say, the dual delay structure can accurately realize a resonator with a central frequency of 1 / 4 of the sampling frequency. In addition, dual delay resonators can be implemented by cascading two delay cells or using pseudo multipath structures. However, the cascaded delay cells require two operational amplifiers, so the power consumption will be higher; and the clock with pseudo multipath structure is too complex, which makes the design of clock generation circuit complex and takes up a large chip area. In order to solve the above problem, we improve a dual-delay resonator structure, which uses only one op amplifier and its clock signal is much simpler than pseudo-multipath structure. In order to verify the effectiveness of the improved dual-delay resonator, a four-order band-pass Sigma-Delta modulator is designed in 0.25 渭 m standard CMOS process. The simulation results show that the SNR of the modulator is 116.7 dB and the power consumption is 4.87 MW, and its FOM is 11.17 W / Hz.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN761
，
本文编号：2397420
[Abstract]:With the development of wireless communication, fiber optic gyroscope technology and integrated circuit technology, the demand for high precision ADC (ADCs) is also increasing. Compared with Nyquist ADC, Sigma-Delta ADC, is more and more important. Because it is insensitive to the matching accuracy of circuit components, it has more advantages in high precision applications. On the other hand, bandpass converters are more efficient than low-pass converters for narrow band intermediate frequency or RF signal conversion, which makes bandpass Sigma-Delta ADC more widely used in wireless communication and fiber optic gyroscope systems. The bandpass Sigma-Delta ADC consists of a bandpass Sigma-Delta modulator and a digital decimation filter. The performance of the band-pass Sigma-Delta modulator is mainly determined by the modulator, and the performance of the modulator is mainly dependent on the resonator used. So it is very important to design an excellent resonator structure for high performance ADC. At present, there are three main resonator structures: feedforward Euler type, lossless discrete integral type and double delay type. But the advantage of dual delay structure over other two structures is that it is insensitive to capacitance mismatch. That is to say, the dual delay structure can accurately realize a resonator with a central frequency of 1 / 4 of the sampling frequency. In addition, dual delay resonators can be implemented by cascading two delay cells or using pseudo multipath structures. However, the cascaded delay cells require two operational amplifiers, so the power consumption will be higher; and the clock with pseudo multipath structure is too complex, which makes the design of clock generation circuit complex and takes up a large chip area. In order to solve the above problem, we improve a dual-delay resonator structure, which uses only one op amplifier and its clock signal is much simpler than pseudo-multipath structure. In order to verify the effectiveness of the improved dual-delay resonator, a four-order band-pass Sigma-Delta modulator is designed in 0.25 渭 m standard CMOS process. The simulation results show that the SNR of the modulator is 116.7 dB and the power consumption is 4.87 MW, and its FOM is 11.17 W / Hz.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN761
，
本文编号：2397420
本文链接：https://www.wllwen.com/kejilunwen/dianzigongchenglunwen/2397420.html
