一种采用CDS技术的红外读出电路设计
发布时间：2019-01-03 06:15
【摘要】：红外探测技术在如今的科学探测、军事、医疗等方面的应用越来越广泛,对其性能的要求也日益提高。作为红外探测系统中十分重要的一部分,红外读出电路的性能至关重要,其噪声性能很大程度上决定了系统成像的质量,因此设计低噪声读出电路有着十分重要的意义。本文设计了一款采用CDS技术的线列式红外读出电路。文中首先详细分析了读出电路中的MOS管噪声、KTC噪声和FPN噪声,并在此基础上重点分析了CDS技术对各类噪声的抑制效果。本红外读出电路的像素单元采用了CTIA结构以稳定探测器偏压、抑制探测器噪声以及提高输出线性度。在列读出级电路中,根据像素单元噪声的特点针对性地设计了CDS电路,通过对CDS电路结构以及工作时序的优化,有效降低了列读出级采样电压的噪声。为了降低整体电路的功耗,列运放采用了动态尾电流供电的设计。此外,列运放和输出缓冲器都采用了噪声较小的五管运放结构来降低电路的输出噪声。本文基于CSMC 0.5μm CMOS工艺完成了电路和版图的设计与仿真。后仿真结果表明：电路能够在5MHz的时钟频率下正常工作,输出摆幅为3.0V,线性度为99.5%,单列电路的功耗为0.257mW,在保证以上指标性能的同时,输出噪声达到0.259mV,动态范围达到81.2dB,满足设计指标的要求。
[Abstract]:Infrared detection technology is more and more widely used in the fields of scientific detection, military affairs, medical treatment and so on. As a very important part of infrared detection system, the performance of infrared readout circuit is very important, and its noise performance determines the imaging quality of the system to a great extent, so it is very important to design low noise readout circuit. A linear infrared readout circuit using CDS technology is designed in this paper. In this paper, the noise of MOS tube, KTC noise and FPN noise in readout circuit are analyzed in detail, and the suppression effect of CDS technology on all kinds of noise is analyzed in detail. The pixel unit of the infrared readout circuit adopts CTIA structure to stabilize the detector bias, suppress the detector noise and improve the output linearity. In the column readout stage circuit, the CDS circuit is designed according to the characteristics of pixel cell noise. By optimizing the structure of the CDS circuit and the working sequence, the noise of the column readout stage sampling voltage is effectively reduced. In order to reduce the power consumption of the whole circuit, the dynamic tail current supply design is adopted. In addition, both the column operational amplifier and the output buffer adopt a five-tube amplifier structure with less noise to reduce the output noise of the circuit. The circuit and layout are designed and simulated based on CSMC 0. 5 渭 m CMOS process. The simulation results show that the circuit can work normally at the clock frequency of 5MHz, the output swing is 3.0V, the linearity is 99.5m and the power consumption of the single-row circuit is 0.257mW. at the same time, the performance of the above indexes is guaranteed. The output noise is 0.259 MV and the dynamic range is 81.2 dB, which meets the design requirements.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN215
本文编号：2398996
[Abstract]:Infrared detection technology is more and more widely used in the fields of scientific detection, military affairs, medical treatment and so on. As a very important part of infrared detection system, the performance of infrared readout circuit is very important, and its noise performance determines the imaging quality of the system to a great extent, so it is very important to design low noise readout circuit. A linear infrared readout circuit using CDS technology is designed in this paper. In this paper, the noise of MOS tube, KTC noise and FPN noise in readout circuit are analyzed in detail, and the suppression effect of CDS technology on all kinds of noise is analyzed in detail. The pixel unit of the infrared readout circuit adopts CTIA structure to stabilize the detector bias, suppress the detector noise and improve the output linearity. In the column readout stage circuit, the CDS circuit is designed according to the characteristics of pixel cell noise. By optimizing the structure of the CDS circuit and the working sequence, the noise of the column readout stage sampling voltage is effectively reduced. In order to reduce the power consumption of the whole circuit, the dynamic tail current supply design is adopted. In addition, both the column operational amplifier and the output buffer adopt a five-tube amplifier structure with less noise to reduce the output noise of the circuit. The circuit and layout are designed and simulated based on CSMC 0. 5 渭 m CMOS process. The simulation results show that the circuit can work normally at the clock frequency of 5MHz, the output swing is 3.0V, the linearity is 99.5m and the power consumption of the single-row circuit is 0.257mW. at the same time, the performance of the above indexes is guaranteed. The output noise is 0.259 MV and the dynamic range is 81.2 dB, which meets the design requirements.
【学位授予单位】：东南大学
【学位级别】：硕士
【学位授予年份】：2016
【分类号】：TN215
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