P-i-N 二极管雪崩耐量测试过程的仿真分析与机理研究
发布时间：2019-02-16 22:08
【摘要】：功率快恢复二极管(Fast Recovery Diode,FRD)常与全控型开关器件反并联构成完整的开关模块,在电路开关过程中起提供回路能量泄放的作用,防止感性负载回路硬关断时产生危险的过电压。正因为如此,二极管常常因为吸收过大的能量而导致损毁,其雪崩耐量将极大影响整个电路甚至系统的正常工作及坚固性,因此针对功率FRD在该类应用中的雪崩耐量问题进行深入研究十分迫切。对功率器件的雪崩能力评价一般是在非钳位感性开关(Unclamped Inductive Load Switching,UIS)条件下测量,目前国际上关于功率FRD的雪崩耐量的文献非常稀少,更未见到有系统研究的报道。本文重点利用器件仿真工具以P-i-N二极管为模型对其雪崩耐量测试过程中内部物理量的演变过程及机理进行探讨和分析,试图为FRD提高雪崩耐量设计提供基本的物理理解、基础数据和方向指导。采用分段线性电流源激励模拟UIS电路中开关瞬间关断时P-i-N二极管受到的电流冲击,利用Sentaurus TCAD仿真软件进行热电耦合的瞬态仿真分析,针对一个耐压为350V左右具有p+n-n+结构及场板型结终端的参考结构以EAS=1.3mJ的能量进行冲击,发现在雪崩耐量测试过程中,器件外端电压主要经历了过冲、负阻及振荡、周期性发展三个阶段。从负阻阶段开始,在p+n-结及n-n+结处都发生了局部的雪崩注入,出现了电流集中现象,形成的电流丝位于结边缘处,宽度约10um,峰值电流密度3.3×104A/cm2。峰值温度曲线的周期性变化与电流丝的运动同步,表现为电流丝运动到左右边缘停留时对应温度的迅速尖峰化,尖峰值平均每次升高80K,而电流丝平移过程对应峰值温度的降落。分析其中机理可知电流丝的运动源于电流丝的自热效应和碰撞电离率的负温度系数。随后,通过增大雪崩耐量测试能量EAS,以峰值温度升高到800K作为失效点,预测了可能发生的失效位置始终为主结边缘处。通过添加单浮场环发现尽管使电场集中位置移到场环边缘,但失效位置仍位于主结,实测结果与仿真预测一致。最后,对P-i-N二极管的静电放电(Electrostatic Discharge,ESD)过程进行了仿真计算,讨论了雪崩耐量测试和反偏ESD测试过程的共性和差异,这些发现及其他相关仿真结果对后续提高FRD雪崩耐量及抗ESD能力的研究将有重要的参考意义。
[Abstract]:The power fast recovery diode (Fast Recovery Diode,FRD) often forms a complete switch module in reverse parallel with the full control switch device, which can provide the circuit with the function of releasing the energy of the circuit during the switching process. Prevent dangerous overvoltage when the inductive load loop is hard turned off. Because of this, diodes are often damaged by absorbing too much energy, and their avalanche tolerance will greatly affect the normal functioning and robustness of the entire circuit and even the system. Therefore, it is very urgent to study the avalanche tolerance problem of power FRD in this kind of applications. The evaluation of the avalanche capability of power devices is generally measured under the condition of non-clamped inductive switch (Unclamped Inductive Load Switching,UIS). At present, there is very little literature on the avalanche tolerance of power FRD in the world, and no systematic research has been reported. In this paper, the evolvement process and mechanism of internal physical quantities in the process of avalanche tolerance testing are discussed and analyzed by using the device simulation tool with P-i-N diode as the model. This paper attempts to provide basic physical understanding, basic data and direction guidance for FRD to improve avalanche tolerance design. A piecewise linear current source is used to simulate the current shock of the P-i-N diode when the switch is switched off in the UIS circuit, and the transient simulation analysis of thermoelectric coupling is carried out by using the Sentaurus TCAD simulation software. For a reference structure with a voltage of 350V or so with a p-n-n structure and a field-plate junction terminal, the energy of EAS=1.3mJ is used to impact. It is found that in the process of avalanche tolerance measurement, the external terminal voltage of the device mainly undergoes overshoot, negative resistance and oscillation. Three stages of periodic development. From the negative resistance stage, the local avalanche injection occurs at both p-n- and n-n junctions, and the current concentration occurs. The resulting current filament is located at the edge of the junction, the width is about 10 umps, and the peak current density is 3.3 脳 104A / cm ~ (2). The periodic variation of the peak temperature curve synchronizes with the current wire movement, which shows that the current wire moves to the left and right edges of the wire, which corresponds to the rapid peak of the temperature. The peak value of the current wire increases by an average of 80K each time. The current-wire translation process corresponds to the drop of peak temperature. It is found that the motion of the current wire originates from the self-heating effect of the current wire and the negative temperature coefficient of the collision ionization rate. Then, by increasing the avalanche tolerance test energy EAS, the peak temperature is increased to 800K as the failure point, and the possible failure position is always predicted at the edge of the junction. It is found by adding a single floating field ring that the failure position is still located in the main junction although the electric field concentration is moved to the edge of the ring. The measured results are in agreement with the simulation prediction. Finally, the electrostatic discharge (Electrostatic Discharge,ESD) process of P-i-N diode is simulated, and the generality and difference of avalanche tolerance test and reverse bias ESD test are discussed. These findings and other relevant simulation results will be of great significance for further research on improving FRD avalanche tolerance and ESD resistance.
【学位授予单位】：北京工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN312.4
本文编号：2424883
[Abstract]:The power fast recovery diode (Fast Recovery Diode,FRD) often forms a complete switch module in reverse parallel with the full control switch device, which can provide the circuit with the function of releasing the energy of the circuit during the switching process. Prevent dangerous overvoltage when the inductive load loop is hard turned off. Because of this, diodes are often damaged by absorbing too much energy, and their avalanche tolerance will greatly affect the normal functioning and robustness of the entire circuit and even the system. Therefore, it is very urgent to study the avalanche tolerance problem of power FRD in this kind of applications. The evaluation of the avalanche capability of power devices is generally measured under the condition of non-clamped inductive switch (Unclamped Inductive Load Switching,UIS). At present, there is very little literature on the avalanche tolerance of power FRD in the world, and no systematic research has been reported. In this paper, the evolvement process and mechanism of internal physical quantities in the process of avalanche tolerance testing are discussed and analyzed by using the device simulation tool with P-i-N diode as the model. This paper attempts to provide basic physical understanding, basic data and direction guidance for FRD to improve avalanche tolerance design. A piecewise linear current source is used to simulate the current shock of the P-i-N diode when the switch is switched off in the UIS circuit, and the transient simulation analysis of thermoelectric coupling is carried out by using the Sentaurus TCAD simulation software. For a reference structure with a voltage of 350V or so with a p-n-n structure and a field-plate junction terminal, the energy of EAS=1.3mJ is used to impact. It is found that in the process of avalanche tolerance measurement, the external terminal voltage of the device mainly undergoes overshoot, negative resistance and oscillation. Three stages of periodic development. From the negative resistance stage, the local avalanche injection occurs at both p-n- and n-n junctions, and the current concentration occurs. The resulting current filament is located at the edge of the junction, the width is about 10 umps, and the peak current density is 3.3 脳 104A / cm ~ (2). The periodic variation of the peak temperature curve synchronizes with the current wire movement, which shows that the current wire moves to the left and right edges of the wire, which corresponds to the rapid peak of the temperature. The peak value of the current wire increases by an average of 80K each time. The current-wire translation process corresponds to the drop of peak temperature. It is found that the motion of the current wire originates from the self-heating effect of the current wire and the negative temperature coefficient of the collision ionization rate. Then, by increasing the avalanche tolerance test energy EAS, the peak temperature is increased to 800K as the failure point, and the possible failure position is always predicted at the edge of the junction. It is found by adding a single floating field ring that the failure position is still located in the main junction although the electric field concentration is moved to the edge of the ring. The measured results are in agreement with the simulation prediction. Finally, the electrostatic discharge (Electrostatic Discharge,ESD) process of P-i-N diode is simulated, and the generality and difference of avalanche tolerance test and reverse bias ESD test are discussed. These findings and other relevant simulation results will be of great significance for further research on improving FRD avalanche tolerance and ESD resistance.
【学位授予单位】：北京工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN312.4
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