光刻友好型冗余金属填充方法研究

发布时间：2019-03-25 18:00

【摘要】：随着集成工艺节点的不断进步,由设计引起的产品良率下降成为了制约集成电路进一步按摩尔定律发展的瓶颈。至此,设计与制造环节不再相互孤立,信息交互的重要性日益凸显,可制造性设计(Design For Manufacture, DFM)技术应运而生。其中,冗余金属填充技术利用无功能性的金属图形填充来控制互连层版图图形密度,是目前最广泛采用的优化化学机械抛光(Chemical-Mechanical Polishing, CMP)后芯片平坦度的可制造性设计方法。填充冗余金属一方面由于引入寄生参数恶化了芯片的电学性能,影响了时序和功耗,另一方面,随着特征尺寸的减小,光刻图形尺寸已接近曝光系统的理论极限,冗余金属的存在加剧了的原始版图光刻图形畸变,需要引起足够的重视。本文在45nm的工艺条件下,针对冗余金属填充引起的光学问题做出研究,并提出优化方案。1)对互连线端与线的位置关系建立模型,研究了互连图形相对位置对光刻畸变的影响。2)针对特殊的T字型、Z字型、线端结构,分别设计了冗余金属预填充方案,修复原始版图中已存在的光刻热点。3)设计了灵活、高效的光刻友好型冗余金属填充流程,并应用到设计实例中,减少冗余金属引入的新光刻热点,实现了光刻与CMP后平坦度的平衡。研究结果表明,利用本文设计的光刻友好型冗余金属填充流程,原始版图特殊光刻热点修复率可达41.47%,新产生的热点数比普通填充降低了70.71%。其中,最小宽度检查(Min Width Check, MWC)热点修复率达到86.67%,新增的线端检查(Line-End Check,LEC)热点数仅为普通填充的1/4。此外,CMP后平坦度与普通填充持平,保证了冗余金属对平坦度的优化,且使最终的填充量降低了1.62%。
[Abstract]:With the continuous progress of integrated process nodes, the decline of product yield caused by design has become the bottleneck of further development of integrated circuits according to Moore's law. So far, design and manufacturing links are no longer isolated from each other, and the importance of information interaction is becoming more and more prominent. Manufacturable design (Design For Manufacture, DFM) technology emerges as the times require. Among them, redundant metal filling technology uses non-functional metal pattern filling to control the pattern density of interconnection layer, which is the most widely used optimization chemical mechanical polishing (Chemical-Mechanical Polishing,) at present. CMP) the design method of manufacturability for chip flatness. On the one hand, the introduction of parasitic parameters worsens the electrical performance of the chip, which affects the timing and power consumption. On the other hand, with the decrease of the feature size, the lithographic pattern size is close to the theoretical limit of the exposure system. The existence of redundant metal aggravates the distortion of the original lithography pattern, which needs to be paid more attention. In this paper, the optical problems caused by redundant metal filling are studied under the technological conditions of 45nm, and the optimization scheme is put forward. 1) the model of the relationship between the end of the interconnection and the position of the line is established. The influence of the relative position of the interconnection pattern on lithography distortion is studied. 2) for the special T-shape, Z-shape and line-end structure, the redundant metal pre-filling scheme is designed respectively. 3) flexible and efficient lithography-friendly redundant metal filling process is designed and applied to design examples to reduce the new lithographic hot spots introduced by redundant metals. The balance between lithography and post-CMP flatness is achieved. The results show that using the lithography-friendly redundant metal filling process designed in this paper, the repair rate of special lithographic hotspots in the original layout can reach 41.47%, and the newly generated hot spots are reduced by 70.71% compared with the ordinary ones. Among them, the minimum width check (Min Width Check, MWC) hot spot repair rate reached 86.67%, the new line-end check (Line-End Check,LEC) hot spot number is only 1-4% of the ordinary fill. In addition, the flatness after CMP is equal to that of ordinary filling, which ensures the optimization of flatness of redundant metals, and reduces the final filling amount by 1.62%.
【学位授予单位】：大连理工大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN405

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