采用SMIC 0.13μm定制化工艺标准单元库的TOF芯片专用TDC模块设计
发布时间：2019-04-18 07:45
【摘要】：TOF(Time-of-Flight,飞行时间)芯片是一种精确测量场景深度信息的传感器,广泛应用于军事、航天航空、导航通信等国防建设的激光测距领域。由于TOF芯片使用单光子发射到遇物体而反射回来的时间来记录衡量深度信息,因此单光子的飞行时间量化是TOF芯片的关键技术。时间相关单光子计数技术(Time-correlated single-photon counting,TCSPC)应用于TOF芯片中,能够将飞行时间通过时钟计数的方式量化读出,其精度的高低决定了芯片性能的好坏。时间数字转换(Time-to-Digital Converter,TDC)电路是TCSPC技术的核心模块。为了实现高精度的TDC电路,本文设计的TDC电路包括三个模块,分别为TDC控制模块,TDC测量模块和TDC译码模块。TDC控制模块用于控制TDC测量模块的工作状态。TDC测量模块采用三级结构:第一级TDC是采用时间周期计数法的粗精度测量,后两级TDC是采用游标型的细精度测量。TDC译码模块利用本文创建的基于SMIC 0.13μm工艺的标准单元库进行半定制集成电路设计与版图实现。本文采用的半定制集成电路设计流程为:首先进行Verilog代码定制译码模块电路的程序,使用Modelsim工具进行译码模块功能仿真;然后定义基于SMIC 0.13μm工艺标准单元的规格和性能等参数,设计单元的版图并进行验证,通过验证后将标准单元制作成用于数字后端工具的标准单元库;最后通过Synopsys工具的Design Compiler和IC Compiler进行综合和自动布局布线完成TDC模块电路的版图设计,并制成GDSII文件并在Cadence工具下进行设计规则以及后仿真的验证。本文的设计成果包括:1)搭建TDC控制与测量模块电路,设计三级测量结构提高TDC电路的分辨率和精度。2)设计8种基本逻辑单元,构成一个实用的SMIC 0.13μm标准单元库,并为每个标准单元设置了不同驱动能力用于综合和自动布局布线时的时序优化。3)在创建的标准单元库在Synopsys的综合工具和布局布线工具上进行TDC模块版图的自动生成,同时利用Cadence Virtuoso工具验证版图的功能。
[Abstract]:TOF (time-of-flight) chip is a kind of sensor for accurate measurement of depth information of scene. It is widely used in the field of laser ranging in military, aerospace, navigation, communication and other national defense construction. Since the TOF chip records the depth information using the time of reflection from the single photon emission to the object, the quantization of the flight time of the single photon is the key technology of the TOF chip. Time-dependent single photon counting (Time-correlated single-photon counting,TCSPC) is used in TOF chip, and the flight time can be read out quantitatively by clock counting. Its precision determines the performance of the chip. Time-to-digital conversion (Time-to-Digital Converter,TDC) circuit is the core module of TCSPC technology. In order to realize the high precision TDC circuit, the TDC circuit designed in this paper includes three modules, which are the TDC control module, respectively. TDC measurement module and TDC decoding module. TDC control module is used to control the working status of TDC measurement module. TDC measurement module adopts three-level structure: the first stage TDC is coarse precision measurement using time period counting method. The latter two stages of TDC are fine precision measurement using cursors. TDC decoding module uses the standard cell library based on SMIC 0.13 渭 m process established in this paper to design the semi-custom integrated circuit and realize the layout. The design flow of semi-custom integrated circuit in this paper is as follows: firstly, the program of Verilog code custom decoding module circuit is carried out, and the function simulation of decoding module is carried out by using Modelsim tool; Then the specification and performance of SMIC 0.13 渭 m process standard unit are defined, and the layout of the unit is designed and verified. After the verification, the standard unit is made into a standard cell library for digital back-end tools. Finally, the layout design of TDC module circuit is completed by Design Compiler and IC Compiler of Synopsys tool, and the layout design of TDC module circuit is completed. The GDSII file is made, and the design rules and post-simulation are verified under the Cadence tool. The design results of this paper include: 1) build TDC control and measurement module circuit, design three-level measurement structure to improve the resolution and precision of TDC circuit. 2) Design 8 kinds of basic logic units to form a practical standard cell library of SMIC 0.13 渭 m. Different driving ability is set for each standard cell to optimize the timing of synthesis and automatic routing. 3) automatic generation of TDC module layout on Synopsys synthesis tool and layout tool is carried out in the created standard cell library. At the same time, the Cadence Virtuoso tool is used to verify the function of the layout.
【学位授予单位】：深圳大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN402
本文编号：2459872
[Abstract]:TOF (time-of-flight) chip is a kind of sensor for accurate measurement of depth information of scene. It is widely used in the field of laser ranging in military, aerospace, navigation, communication and other national defense construction. Since the TOF chip records the depth information using the time of reflection from the single photon emission to the object, the quantization of the flight time of the single photon is the key technology of the TOF chip. Time-dependent single photon counting (Time-correlated single-photon counting,TCSPC) is used in TOF chip, and the flight time can be read out quantitatively by clock counting. Its precision determines the performance of the chip. Time-to-digital conversion (Time-to-Digital Converter,TDC) circuit is the core module of TCSPC technology. In order to realize the high precision TDC circuit, the TDC circuit designed in this paper includes three modules, which are the TDC control module, respectively. TDC measurement module and TDC decoding module. TDC control module is used to control the working status of TDC measurement module. TDC measurement module adopts three-level structure: the first stage TDC is coarse precision measurement using time period counting method. The latter two stages of TDC are fine precision measurement using cursors. TDC decoding module uses the standard cell library based on SMIC 0.13 渭 m process established in this paper to design the semi-custom integrated circuit and realize the layout. The design flow of semi-custom integrated circuit in this paper is as follows: firstly, the program of Verilog code custom decoding module circuit is carried out, and the function simulation of decoding module is carried out by using Modelsim tool; Then the specification and performance of SMIC 0.13 渭 m process standard unit are defined, and the layout of the unit is designed and verified. After the verification, the standard unit is made into a standard cell library for digital back-end tools. Finally, the layout design of TDC module circuit is completed by Design Compiler and IC Compiler of Synopsys tool, and the layout design of TDC module circuit is completed. The GDSII file is made, and the design rules and post-simulation are verified under the Cadence tool. The design results of this paper include: 1) build TDC control and measurement module circuit, design three-level measurement structure to improve the resolution and precision of TDC circuit. 2) Design 8 kinds of basic logic units to form a practical standard cell library of SMIC 0.13 渭 m. Different driving ability is set for each standard cell to optimize the timing of synthesis and automatic routing. 3) automatic generation of TDC module layout on Synopsys synthesis tool and layout tool is carried out in the created standard cell library. At the same time, the Cadence Virtuoso tool is used to verify the function of the layout.
【学位授予单位】：深圳大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：TN402
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