基于BCD工艺的ESD器件性能研究与优化
发布时间：2019-04-23 23:25
【摘要】：随着集成电路的发展,高压功率集成电路在汽车电子、显示驱动等方面显示出巨大应用前景。而静电放电(Electrostatic Discharge,ESD)对高压集成电路存在巨大的潜在威胁。在BCD (Bipolar-CMOS-DMOS)工艺下,由于器件面临着更高的工作电压、更加恶劣的工作环境等问题,使得高压集成电路的静电防护设计面临着更加严峻的挑战。同时,由于工艺对ESD防护设计有着巨大的影响,所以必须单独为不同的工艺设计ESD防护器件,这也增大了ESD防护设计的难度和工作量。本文基于0.18μm BCD工艺,研究了相关高压器件的ESD特性。本文首先对ESD的基本理论进行了介绍,包括ESD防护基本理论、ESD测试模型以及ESD设计窗口。在此基础上,引入二极管、BJT、LDMOS(Lateral Diffused MOS)以及SCR(Silicon Controlled Rectifier)等常规的ESD防护器件,并分别介绍了这些器件在ESD事件下的工作原理。并通过对常规LDMOS及SCR防护器件的分析,阐述这两类ESD防护器件存在的问题。由于LDMOS器件存在电流不均匀导通,导致LDMOS器件的ESD防护能力低下。为了优化和改进LDMOS器件的特性,本文在BCD工艺下设计了相关的LDMOS器件并进行了测试。TLP测试结果表明,改变LDMOS器件的沟道长度对其ESD性能基本没有影响。同时,硅化物工艺下拉大漏到栅的距离也很难形成有效的镇流效应。通过嵌入SCR到LDMOS器件中是一种提高LDMOS器件ESD防护能力的有效手段。其中分割型SCR-LDMOS器件的ESD失效电流和P+/N+的比率成正相关。由于SCR存在大回滞现象,所以必须提高SCR类型器件的维持电压以及降低其触发电压。对于单向SCR大回滞类型器件,研究了MLSCR结构和双触发类型SCR结构来降低触发电压,TLP测试结果表明该两种方案均能降低SCR的触发电压。然后引入了提高维持电压的结构如分割型SCR结构、高维持电压的HHV-SCR结构。最后提出了RC辅助触发的SCR结构,该结构可以提供非回滞特性的ESD曲线,该结构能够将电压钳位在10V以下并提供高达9KV的HBM防护能力。适用于电源轨之间的电压钳位器件。为了减小版图面积,本文最后给出了双向SCR结构设计以及其中的一个改进型双向SCR结构。
[Abstract]:With the development of integrated circuits, high-voltage power integrated circuits show great application prospects in automotive electronics, display drive and so on. Electrostatic discharge (Electrostatic Discharge,ESD) is a potential threat to high voltage integrated circuits (HV IC). In the BCD (Bipolar-CMOS-DMOS) process, the electrostatic protection design of high voltage integrated circuits faces more severe challenges due to the higher working voltage and worse working environment. At the same time, because of the great influence of the process on the ESD protection design, it is necessary to design the ESD protection devices for different processes, which increases the difficulty and workload of the ESD protection design. In this paper, the ESD characteristics of correlation high voltage devices are studied based on 0.18 渭 m BCD process. This paper first introduces the basic theory of ESD, including the basic theory of ESD protection, ESD test model and ESD design window. On this basis, the conventional ESD protective devices such as diodes, BJT,LDMOS (Lateral Diffused MOS) and SCR (Silicon Controlled Rectifier) are introduced, and the working principles of these devices under ESD events are introduced respectively. Based on the analysis of conventional LDMOS and SCR protective devices, the existing problems of these two types of ESD protective devices are expounded. Due to the non-uniform current conduction of LDMOS devices, the ESD protection ability of LDMOS devices is low. In order to optimize and improve the characteristics of LDMOS devices, the related LDMOS devices are designed and tested in BCD process. The results show that changing the channel length of LDMOS devices has little effect on the performance of ESD devices. At the same time, it is very difficult to form effective ballasting effect by widening the distance from drain to gate in silicide process. Embedding SCR into LDMOS devices is an effective way to improve the ESD protection ability of LDMOS devices. The ESD failure current of split SCR-LDMOS devices is positively correlated with the P / N ratio. Because of the large hysteresis in SCR, it is necessary to increase the maintenance voltage and reduce the trigger voltage of SCR devices. For unidirectional SCR devices with large hysteresis, the MLSCR structure and the double trigger type SCR structure are studied to reduce the trigger voltage. The TLP test results show that both schemes can reduce the trigger voltage of SCR. Then, the structure of improving maintenance voltage, such as split SCR structure and high maintenance voltage HHV-SCR structure, is introduced. Finally, a RC-aided triggered SCR structure is proposed, which can provide ESD curves with non-hysteresis characteristics. The structure can clamp voltage below 10V and provide HBM protection as high as 9KV. Suitable for voltage clamp devices between power rails. In order to reduce the layout area, the design of bi-directional SCR structure and an improved bi-directional SCR structure are presented in this paper.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386
本文编号：2463899
[Abstract]:With the development of integrated circuits, high-voltage power integrated circuits show great application prospects in automotive electronics, display drive and so on. Electrostatic discharge (Electrostatic Discharge,ESD) is a potential threat to high voltage integrated circuits (HV IC). In the BCD (Bipolar-CMOS-DMOS) process, the electrostatic protection design of high voltage integrated circuits faces more severe challenges due to the higher working voltage and worse working environment. At the same time, because of the great influence of the process on the ESD protection design, it is necessary to design the ESD protection devices for different processes, which increases the difficulty and workload of the ESD protection design. In this paper, the ESD characteristics of correlation high voltage devices are studied based on 0.18 渭 m BCD process. This paper first introduces the basic theory of ESD, including the basic theory of ESD protection, ESD test model and ESD design window. On this basis, the conventional ESD protective devices such as diodes, BJT,LDMOS (Lateral Diffused MOS) and SCR (Silicon Controlled Rectifier) are introduced, and the working principles of these devices under ESD events are introduced respectively. Based on the analysis of conventional LDMOS and SCR protective devices, the existing problems of these two types of ESD protective devices are expounded. Due to the non-uniform current conduction of LDMOS devices, the ESD protection ability of LDMOS devices is low. In order to optimize and improve the characteristics of LDMOS devices, the related LDMOS devices are designed and tested in BCD process. The results show that changing the channel length of LDMOS devices has little effect on the performance of ESD devices. At the same time, it is very difficult to form effective ballasting effect by widening the distance from drain to gate in silicide process. Embedding SCR into LDMOS devices is an effective way to improve the ESD protection ability of LDMOS devices. The ESD failure current of split SCR-LDMOS devices is positively correlated with the P / N ratio. Because of the large hysteresis in SCR, it is necessary to increase the maintenance voltage and reduce the trigger voltage of SCR devices. For unidirectional SCR devices with large hysteresis, the MLSCR structure and the double trigger type SCR structure are studied to reduce the trigger voltage. The TLP test results show that both schemes can reduce the trigger voltage of SCR. Then, the structure of improving maintenance voltage, such as split SCR structure and high maintenance voltage HHV-SCR structure, is introduced. Finally, a RC-aided triggered SCR structure is proposed, which can provide ESD curves with non-hysteresis characteristics. The structure can clamp voltage below 10V and provide HBM protection as high as 9KV. Suitable for voltage clamp devices between power rails. In order to reduce the layout area, the design of bi-directional SCR structure and an improved bi-directional SCR structure are presented in this paper.
【学位授予单位】：电子科技大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN386
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