纳米工艺ASIC物理设计的实现和信号完整性优化
发布时间：2019-04-25 17:03
【摘要】：信号完整性是电子信号携带信息的可靠性,和抵抗来自附近信号高频电磁干扰影响的能力。当电子信号携带的信息失真,或高频电磁干扰对电子信号造成了影响时,即出现了所谓的信号完整性问题。目前,集成电路工艺已发展到纳米水平,时钟频率达到上GHz。伴随着半导体工艺的不断发展,集成电路的线间互连问题已经成为决定整个芯片性能、功耗、可靠性及成本的主导因素。信号完整性问题正成为制约超大规模集成电路继续发展的主要瓶颈。ASIC物理设计中的信号完整性问题可分为两类:串扰噪声和电迁移。串扰噪声由连线间的耦合电容引起,其不仅影响电路延迟,引起时序违例(串扰delta延迟),还会影响电路功能(串扰毛刺),导致芯片故障。电迁移由芯片内部的寄生电阻引起,也会引起芯片性能的降低,甚至导致芯片失效。本文的研究基于ASIC物理设计,对纳米工艺下信号完整性问题进行分析并提出预防策略和修复方法。首先,对连线延迟和寄生参数提取进行建模和理论分析,探索减少串扰噪声的方法,并通过与业界常用的物理设计工具IC Compiler相结合来阐述以预防为主,进而修复达到串扰噪声收敛的优化方法。最后,将此方法应用于实验室具体的项目中,验证结果表明预防策略能大幅减少信号完整性问题,修复方法能有效减少迭代次数,达到快速解决信号完整性问题的效果。针对金属电迁移问题,文中首先介绍物理设计工具IC Compiler分析电迁移的方法,从方法中用到的各个参数寻找突破口,优化电迁移。并且也通过实验室具体项目验证了此方法对电迁移有很好的优化效果。本文的实际意义是在物理设计方面提出了纳米工艺下信号完整性问题的优化方法,完善了实验室纳米工艺物理设计流程,并且通过实验室实际SHA-256模块物理设计项目,很好地验证了此方法的可行性。
[Abstract]:Signal integrity is the reliability of electronic signals to carry information and the ability to resist high-frequency electromagnetic interference from nearby signals. The so-called signal integrity problem arises when the information distortion carried by the electronic signal, or the high frequency electromagnetic interference (HEMI), affects the electronic signal. At present, the integrated circuit technology has developed to the nanometer level, and the clock frequency is up to GHz. With the development of semiconductor technology, the inter-line interconnection of integrated circuits has become the leading factor to determine the performance, power consumption, reliability and cost of the whole chip. Signal integrity is becoming the main bottleneck restricting the development of VLSI. Signal integrity problems in ASIC physical design can be divided into two categories: crosstalk noise and electromigration. Crosstalk noise is caused by coupling capacitance between wires, which not only affects circuit delay, causes timing violation (crosstalk delta delay), but also affects circuit function (crosstalk burr), leading to chip failure. Electromigration is caused by the parasitic resistance in the chip, which also leads to the degradation of the chip performance and even the failure of the chip. In this paper, based on the physical design of ASIC, the problem of signal integrity in nano-technology is analyzed and the preventive strategy and repair method are put forward. Firstly, modeling and theoretical analysis are carried out on the extraction of line delay and parasitic parameters, and the methods of reducing crosstalk noise are explored, and the prevention is mainly explained by combining with the physical design tool IC Compiler, which is commonly used in the industry. Furthermore, the optimization method which achieves crosstalk noise convergence is repaired. Finally, this method is applied to specific laboratory projects. The verification results show that the preventive strategy can greatly reduce the signal integrity problem, and the repair method can effectively reduce the number of iterations to quickly solve the signal integrity problem. In order to solve the problem of metal electromigration, the method of analyzing electromigration by physical design tool IC Compiler is introduced in this paper, and the breakthrough point is found from the parameters used in the method to optimize the electromigration. It is also verified that this method has a good optimization effect on electromigration through specific laboratory projects. The practical significance of this paper is to put forward the optimization method of signal integrity under nano-technology in physical design, perfect the physical design flow of nano-process in laboratory, and through the physical design project of SHA-256 module in laboratory, The feasibility of this method is well verified.
【学位授予单位】：北京工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402
本文编号：2465306
[Abstract]:Signal integrity is the reliability of electronic signals to carry information and the ability to resist high-frequency electromagnetic interference from nearby signals. The so-called signal integrity problem arises when the information distortion carried by the electronic signal, or the high frequency electromagnetic interference (HEMI), affects the electronic signal. At present, the integrated circuit technology has developed to the nanometer level, and the clock frequency is up to GHz. With the development of semiconductor technology, the inter-line interconnection of integrated circuits has become the leading factor to determine the performance, power consumption, reliability and cost of the whole chip. Signal integrity is becoming the main bottleneck restricting the development of VLSI. Signal integrity problems in ASIC physical design can be divided into two categories: crosstalk noise and electromigration. Crosstalk noise is caused by coupling capacitance between wires, which not only affects circuit delay, causes timing violation (crosstalk delta delay), but also affects circuit function (crosstalk burr), leading to chip failure. Electromigration is caused by the parasitic resistance in the chip, which also leads to the degradation of the chip performance and even the failure of the chip. In this paper, based on the physical design of ASIC, the problem of signal integrity in nano-technology is analyzed and the preventive strategy and repair method are put forward. Firstly, modeling and theoretical analysis are carried out on the extraction of line delay and parasitic parameters, and the methods of reducing crosstalk noise are explored, and the prevention is mainly explained by combining with the physical design tool IC Compiler, which is commonly used in the industry. Furthermore, the optimization method which achieves crosstalk noise convergence is repaired. Finally, this method is applied to specific laboratory projects. The verification results show that the preventive strategy can greatly reduce the signal integrity problem, and the repair method can effectively reduce the number of iterations to quickly solve the signal integrity problem. In order to solve the problem of metal electromigration, the method of analyzing electromigration by physical design tool IC Compiler is introduced in this paper, and the breakthrough point is found from the parameters used in the method to optimize the electromigration. It is also verified that this method has a good optimization effect on electromigration through specific laboratory projects. The practical significance of this paper is to put forward the optimization method of signal integrity under nano-technology in physical design, perfect the physical design flow of nano-process in laboratory, and through the physical design project of SHA-256 module in laboratory, The feasibility of this method is well verified.
【学位授予单位】：北京工业大学
【学位级别】：硕士
【学位授予年份】：2015
【分类号】：TN402
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