一种显化硬件木马功耗的设计方法
发布时间：2019-06-05 20:42
【摘要】：随着科学技术的发展,集成电路的规模不断增大,功能复杂度不断提升,半导体设计制造行业全球化趋势不断加强,迫使芯片设计和生产的多个环节相分离,使得在芯片中植入硬件木马成为可能。由于硬件木马一般都是第三方精心设计实现,并且是对底层硬件进行的修改,具有隐蔽性强、破坏力大、设计实现要求高、检测难度大等特点。为应对硬件木马带来的安全威胁,本文以基于旁路功耗信息分析的硬件木马防护及检测技术为基础,研究显化硬件木马的方法,主要工作有:随着集成电路规模不断扩大,规模相对很小的木马电路表现出的旁路信息极易被淹没。为了显化硬件木马功耗,本文提出了一种分时控制的硬件木马功耗显化方法。通过对时钟网络的分时模块控制,降低芯片的瞬时动态功耗,显化了硬件木马功耗。实验数据表明:当划分为3个大小较均衡的模块时,各周期的峰值功耗可以降到29.9%~36.2%之间;在降低总的瞬时动态功耗情况下,木马功耗可以得到平均3.02倍的显化。功能模块划分完成之后,各模块之间一般有信息交互。为了实际应用分时功耗显化机制,提出两种方案:一种是插入隔离链方法,该法简单易用,可自动化实现,但面积与延时开销较大;另一种是栈入式设计方法,该方法要对设计中模块间寄存器栈位关系进行调整,但是无需插入额外逻辑,面积与延时开销很小。实验数据表明:对10个模块的逻辑电路,应用分时机制与栈入式设计后,在没有额外增加面积和延时的情况下,各周期的峰值功耗可以降低到5.74%~10.87%之间,大部分集中在10.5%左右;在降低总的瞬时动态功耗情况下,木马功耗可以得到平均8.67倍的显化。
[Abstract]:With the development of science and technology, the scale of integrated circuits is increasing, the complexity of functions is increasing, and the globalization trend of semiconductor design and manufacturing industry is strengthening, which forces the separation of chip design and production. Makes it possible to insert hardware Trojans into the chip. Because the hardware Trojan horse is usually carefully designed and implemented by the third party, and it is a modification of the underlying hardware, it has the characteristics of strong concealment, great destructive power, high design and implementation requirements, difficult detection and so on. In order to deal with the security threat caused by hardware Trojan horse, this paper studies the method of explicit hardware Trojan horse based on the protection and detection technology of hardware Trojan horse based on bypass power information analysis. The main work is as follows: with the continuous expansion of integrated circuit scale, The bypass information shown by the relatively small Trojan horse circuit is easily flooded. In order to display the power consumption of hardware Trojan horse, a time-sharing control method for power consumption visualization of hardware Trojan horse is proposed in this paper. Through the time-sharing module control of the clock network, the instantaneous dynamic power consumption of the chip is reduced, and the power consumption of the hardware Trojan horse is displayed. The experimental data show that when divided into three more balanced modules, the peak power consumption of each cycle can be reduced to 29.9% 鈮，
本文编号：2493810
[Abstract]:With the development of science and technology, the scale of integrated circuits is increasing, the complexity of functions is increasing, and the globalization trend of semiconductor design and manufacturing industry is strengthening, which forces the separation of chip design and production. Makes it possible to insert hardware Trojans into the chip. Because the hardware Trojan horse is usually carefully designed and implemented by the third party, and it is a modification of the underlying hardware, it has the characteristics of strong concealment, great destructive power, high design and implementation requirements, difficult detection and so on. In order to deal with the security threat caused by hardware Trojan horse, this paper studies the method of explicit hardware Trojan horse based on the protection and detection technology of hardware Trojan horse based on bypass power information analysis. The main work is as follows: with the continuous expansion of integrated circuit scale, The bypass information shown by the relatively small Trojan horse circuit is easily flooded. In order to display the power consumption of hardware Trojan horse, a time-sharing control method for power consumption visualization of hardware Trojan horse is proposed in this paper. Through the time-sharing module control of the clock network, the instantaneous dynamic power consumption of the chip is reduced, and the power consumption of the hardware Trojan horse is displayed. The experimental data show that when divided into three more balanced modules, the peak power consumption of each cycle can be reduced to 29.9% 鈮，
本文编号：2493810
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