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2.5Gbps串行接口发送端设计

发布时间:2019-06-12 00:53
【摘要】:随着信息产业的不断发展,各类电子产品不断涌现,人们的生活水准日益提高。计算机中处理器处理能力的不断提高,庞大的数据量畅通无阻的高速传输已经成为支撑信息产业发展的关键环节。伴随着串行接口技术的出现,突破了并行接口关于速率的瓶颈,成功的缓解了高速数据通信行业的数据传输问题。随着传输速率的不断提高,各类串行接口也相继出现,基于LVDS、VML、CML等技术的接口芯片大量生产。但串行接口中存在的问题也严重影响高速数据传输的品质。其中,信道的高频损耗已经成为限制高速数据传输系统性能的关键因素。另外,电路设计中的其他非理想因素同样也是影响高速传输的重要因素。因此,设计者需要深入的了解这些问题并做出解决方案。 本文中针对高速互连系统中的关键性问题进行了深入的研究,并完成了接口电路中发送端部分的设计。首先,对互连信道的特性进行了分析并建立了信道模型。其次,对高速互连系统中存在的信号完整性进行了分析,详细介绍了数据传输链路上存在的非理想因素并给出了解决的方法。然后,简单介绍了几种目前业界内广泛使用的LVDS、VML、CML等接口电路,确定了基于SMIC180nm工艺采用CML技术实现2.5Gbps传输速率的方案,,详细的分析了业界内针对信道的高频损耗所采用的均衡技术原理并提出了本设计中所采用的预加重技术。最后详细的给出了发送端整体电路的设计并完成了相应版图的绘制。在Cadence平台下,利用Spectre仿真器对各模块电路以及整体电路进行了仿真并给出了相应的前仿真和后仿真结果。 在本文最后一章对论文作出了总结,提出了本设计中仍存在的一些问题并给出了解决方案。
[Abstract]:With the continuous development of information industry, all kinds of electronic products continue to emerge, and people's living standards are improving day by day. With the continuous improvement of processor processing ability in computer, the unimpeded and high-speed transmission of huge amount of data has become the key link to support the development of information industry. With the emergence of serial interface technology, the bottleneck of parallel interface about rate has been broken through, and the problem of data transmission in high-speed data communication industry has been alleviated successfully. With the continuous increase of transmission rate, all kinds of serial interfaces have appeared one after another, and the interface chips based on LVDS,VML,CML and other technologies are produced in large quantities. However, the problems existing in serial interface also seriously affect the quality of high-speed data transmission. Among them, the high frequency loss of the channel has become the key factor to limit the performance of high speed data transmission system. In addition, other non-ideal factors in circuit design are also important factors affecting high-speed transmission. Therefore, designers need to have an in-depth understanding of these problems and make solutions. In this paper, the key problems in high-speed interconnection system are deeply studied, and the design of the transmitter in the interface circuit is completed. Firstly, the characteristics of interconnect channel are analyzed and the channel model is established. Secondly, the signal integrity in the high-speed interconnection system is analyzed, the non-ideal factors existing in the data transmission link are introduced in detail, and the solutions are given. Then, several interface circuits such as LVDS,VML,CML, which are widely used in the industry, are briefly introduced, and the scheme of using CML technology to realize the transmission rate of 2.5Gbps based on SMIC180nm process is determined. the principle of equalization technology used in the industry for the high frequency loss of the channel is analyzed in detail, and the preweighting technology used in this design is put forward. Finally, the design of the whole circuit at the transmitter is given in detail and the corresponding layout is drawn. On Cadence platform, each module circuit and the whole circuit are simulated by Spectre simulator, and the corresponding pre-simulation and post-simulation results are given. In the last chapter of this paper, the paper is summarized, some problems still exist in this design are put forward and the solutions are given.
【学位授予单位】:北京理工大学
【学位级别】:硕士
【学位授予年份】:2015
【分类号】:TN402

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