基于忆阻器的D触发器设计及其在扫描链设计中的应用研究
发布时间：2023-04-11 06:11
在大多数的电子系统中,由于供电意外关闭造成数据丢失的情况时有发生。尤其随着信息技术的快速发展,电子系统承载的数据规模不断增大,数据丢失可能会造成巨大的经济损失,而且中断后恢复数据难度大,需要耗费大量的时间和金钱。采用先进的数据保护技术可以大大减少中断带来的风险。如何解决意外断电或者供电不稳定时的数据丢失问题也成为近些年的重要研究课题。目前主流的解决方案是利用数据备份技术,将运行数据保存在非易失性存储器中,从而最大限度地减少因电源中断造成的负面影响。然而这种数据备份技术,数据保存过程复杂,数据传输速度受系统结构与存储类型限制。随着新型非易失性器件的出现,这种问题有了新的解决方案。触发器是构成时序电路的基本逻辑单元,也是计算机,通信和其他类型数字电子系统的重要单元电路。触发器是典型的易失性器件,在电源中断的情况下,存储在触发器中的数据将消失。如果触发器具有非易失性,即掉电后依旧能够保持掉电前的状态,则整个系统也可以实现瞬态的数据恢复。随着各种非易失器件的兴起,研究者们提出了各种基于新器件的触发器电路使触发器具有非易失功能。其主要思想是在断电时将触发器内容存储在非易失性电路中,上电后从非易失...
【文章页数】：63 页
【学位级别】：硕士
【文章目录】：
摘要
Abstract
Acknowledgement
Nomenclature
Chapter1 Introduction
1.1 Necessarity for Nonvolatile Memory
1.2 Application of Memristor in Nonvolatile Memory
1.3 Application of Memristor in Scan Design
1.4 Motivations and Objectives
1.5 Organization of the Dissertation
Chapter2 Literature Review
2.1 Memristor and its Model
2.2 Memristor Applied in Latch and DFF
2.2.1 Traditional D Latch and DFF
2.2.2 Memristor-based D Latch and DFF
2.3 The Application of Memristor in Scan Design
2.3.1 Scan Design in VLSI
2.3.2 Scan Flip-Flop and Scan Hold Flip-Flop
2.3.3 Memristor-based Scan Design
2.4 Summary
Chapter3 Memristor-based D Latch and DFF Design
3.1 The Structure of the Proposed D Latch Design
3.1.1 Analysis of the Proposed D Latch Design
3.1.2 Simulation Result of D Latch
3.2 D type Master-slave Flip-Flop
3.2.1 The Proposed Master-slave DFF Design
3.2.2 The Simulation of the Proposed Master-slave DFF Design
3.2.3 Performance Analysis of the Proposed DFF
3.3 Summary
Chapter4 Application of Memristor-based DFF in Scan Design
4.1 The Design of the Scan Flip-Flop
4.1.1 The Proposed Scan Flip-Flop
4.1.2 Simulation Result of the Proposed SFF
4.2 The Design of Scan Hold Flip-Flop
4.2.1 The Proposed Scan Hold Flip-Flop
4.2.2 Simulation Result of the Proposed SHFF
4.3 The Design Evaluation and Analysis
4.3.1 Analysis of Hardware Overhead
4.3.2 Analysis of Power
4.3.3 Analysis of Delay
4.4 Summary
Conclusions
References
Author’s Publications
本文编号：3789460
【文章页数】：63 页
【学位级别】：硕士
【文章目录】：
摘要
Abstract
Acknowledgement
Nomenclature
Chapter1 Introduction
1.1 Necessarity for Nonvolatile Memory
1.2 Application of Memristor in Nonvolatile Memory
1.3 Application of Memristor in Scan Design
1.4 Motivations and Objectives
1.5 Organization of the Dissertation
Chapter2 Literature Review
2.1 Memristor and its Model
2.2 Memristor Applied in Latch and DFF
2.2.1 Traditional D Latch and DFF
2.2.2 Memristor-based D Latch and DFF
2.3 The Application of Memristor in Scan Design
2.3.1 Scan Design in VLSI
2.3.2 Scan Flip-Flop and Scan Hold Flip-Flop
2.3.3 Memristor-based Scan Design
2.4 Summary
Chapter3 Memristor-based D Latch and DFF Design
3.1 The Structure of the Proposed D Latch Design
3.1.1 Analysis of the Proposed D Latch Design
3.1.2 Simulation Result of D Latch
3.2 D type Master-slave Flip-Flop
3.2.1 The Proposed Master-slave DFF Design
3.2.2 The Simulation of the Proposed Master-slave DFF Design
3.2.3 Performance Analysis of the Proposed DFF
3.3 Summary
Chapter4 Application of Memristor-based DFF in Scan Design
4.1 The Design of the Scan Flip-Flop
4.1.1 The Proposed Scan Flip-Flop
4.1.2 Simulation Result of the Proposed SFF
4.2 The Design of Scan Hold Flip-Flop
4.2.1 The Proposed Scan Hold Flip-Flop
4.2.2 Simulation Result of the Proposed SHFF
4.3 The Design Evaluation and Analysis
4.3.1 Analysis of Hardware Overhead
4.3.2 Analysis of Power
4.3.3 Analysis of Delay
4.4 Summary
Conclusions
References
Author’s Publications
本文编号：3789460
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