油气层光纤干涉探测实时解调技术研究及应用

发布时间：2018-01-28 23:58

本文关键词： 光纤传感网络干涉解调现场可编程门阵列高吞吐率流水线技术　出处：《南京理工大学》2017年硕士论文　论文类型：学位论文

【摘要】：石油作为全球经济和社会发展中具有重要战略地位的能源资源,对油气层储层信息的精确勘探尤为重要。在被广泛使用的地震波法探测油气层系统中,光纤传感器作为检波器进行大规模复用的组网架构以及系统对大量数据高速、实时处理的需求,已成为亟待解决的关键问题。本课题的工作主要包括光纤传感器组网架构设计及高速、实时的数据采集、处理、传输实现两部分。首先针对应用于地震波检测的高分辨率光纤油气层探测系统,设计了一种高性能、低成本、大数据量的基于相位调制型迈克尔逊光纤传感器的组网架构。其次,重点实现了适用于光纤传感器组网应用中的实时干涉解调系统。根据传统的单片机或PC等运算平台难以适应传感器组网带来的大规模数据高速、实时处理的现状,选取Altera公司的EP3SE110F115213 FPGA作为系统实时控制与处理的核心。实时干涉解调系统主要包括:在时间同步部分,根据地震波法探测油气层对时间同步的精确要求,选取Hemisphere公司的GPS实现高精度授时,其授时精度为20ns,通过RS232串口实现了 GPS与FPGA间的串口通信;在数据采集部分,选用ADI公司的ADC芯片实现多路数据的高速采集,并利用FPGA基于SPI串口实现对ADC芯片的指令传输进行芯片配置,进而在此基础上设计了一种采样时间窗口精确定位方法,能够准确实时地提取每个传感器的光强数据;在数据处理部分,依据本课题所述系统信号频率缓慢变化的特点(频率范围为1Hz～200Hz),基于本课题提出的二元矩形脉冲相位调制解调法和区域生长算法思想设计并实现了一种适于FPGA的高吞吐率相位计算的硬件架构,它主要包含包裹相位计算和相位解包两个子模块。该相位计算模块采用浮点运算单元和流水线运行,重点实现了基于FIFO的数据流同步。FPGA的系统工作频率为200MHz。实现了单个时钟周期处理一个相位信息的吞吐能力,每秒处理相位数据量可达2×108。在数据通信部分,通过组帧处理将大量传感器数据根据帧头信息进行归类、整合后,由USB2.0芯片实现FPGA与上位机之间的通信。该解调系统具有精确的采样窗口定位及信号提取能力,实现了适用于FPGA流水线架构的高吞吐率的干涉相位计算及解包算法,同时能实现快速的数据处理及传输。本课题在FPGA平台上进行了大量的仿真和实时调试。实验证明,该系统工作性能良好,为高分辨率光纤油气层探测系统提供了一种新的实时干涉解调的实现方案。
[Abstract]:Oil as the world's economic and social development has an important strategic position in energy resources, oil and gas exploration of accurate reservoir information is particularly important. In the detection of seismic wave method is widely used in oil and gas system, network architecture of optical fiber sensor as the detector for reuse and system of a large number of data of high speed, real-time processing. That has become a key problem to be solved. The work of this paper mainly includes the optical fiber sensor network architecture design and high speed data acquisition, real-time processing and transmission is realized in two parts. Firstly, high resolution fiber oil and gas detection system based on seismic wave detection, the design of a high performance, low cost, large amount of data the network architecture of phase modulation type optical fiber sensor based on Michelson. Secondly, focused on the realization of the real time interference for optical fiber sensor network application solutions Transfer system. According to the traditional SCM or PC operation platform is difficult to adapt to the large-scale data high speed sensor network brings the status of real-time processing, select Altera's EP3SE110F115213 FPGA as the core of real-time system control and data processing. The real-time demodulation system mainly includes: the synchronization part in time, according to the precise requirements of seismic wave detection method of oil and gas for time synchronization, select Hemisphere's GPS to realize the high precision timing, the timing accuracy of 20ns, the serial communication between FPGA and GPS through RS232 serial port; in the part of data acquisition to achieve high-speed multi-channel data acquisition using ADC chip of ADI company, and using FPGA SPI serial port command transmission on ADC chip chip based configuration, and then on the basis of the design of a sampling time window method for accurate positioning, accurate real-time extraction of each sensor The light intensity data; the data processing part changes according to the subject characteristics of the system signal frequency slow (frequency range is from 1Hz to 200Hz), this paper puts forward the two element rectangular pulse phase modulation demodulation method and region growing algorithm to design and implement a FPGA suitable for high throughput computing hardware phase based on the architecture, it mainly includes the wrapped phase calculation and phase unwrapping of two sub modules. The phase calculation module using floating-point arithmetic unit and pipeline operation, mainly focus on the implementation of the system of the working frequency of FIFO data stream synchronization based on.FPGA to achieve throughput of a single clock cycle with a phase information for 200MHz., second phase data amount 2 * 108. in the data communication part, by frame processing a large number of sensor data are classified, according to the header information integration, by USB2.0 chip FPGA and host The communication between machines. The demodulation system has accurate sampling window positioning and signal extraction ability, to achieve high throughput of the interferometric phase unwrapping algorithm and calculation for FPGA pipeline architecture, and can realize fast data processing and transmission. This paper makes a great deal of simulation and real-time debugging experiment on the FPGA platform. Proved that the system has a good performance, provides a scheme of real-time Interferometric Demodulation for new high resolution fiber oil and gas detection system.

【学位授予单位】：南京理工大学
【学位级别】：硕士
【学位授予年份】：2017
【分类号】：P631.4;P618.13

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